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From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.
We appreciate your patience as we improve our online experience.
01-04-2010 08:53 AM
Hello David,
I'm now building a schematic for my new PCIe-6535. This testcase is a simple SPI bus expander, to test the SPI emulating. I still haven't looked in the programming/software behind the 6535 or behind the SDW/JDW lib's.
Can you tell me, when I use a device as the PCIe-6535 for emulating JTAG/SPI with the SDW JDW reference designs, should I then connect all lines (SCK,SI,SO,CS) to the Dig IO channels, or do I need to use the so called PFI channels as well?
Since your bit-banging I would guess you need only DIO?
Kind regards
01-04-2010 09:51 AM
10-05-2010 04:51 PM
In the Serial Protocol Communication Reference Design for Digital Waveform Devices document, it mentions, "During the Initialization sequence, configure the device's Hardware Compare engine to operate in "Stimulus and Expected Response" mode." There is a graphic showing the niHSDIO property node with the attribute "HardwareCompare.Mode" and there is an enum feeding it set to "Stimulus and Expected Result". Where is that attribute? I can't find it. I'm using LV 2009 and NI HSDIO 1.7.2.
I do see an attribute for "Supported Data States" which I can set to HWC mode which allows for 0, 1, Z, L, H, and X on the stimulus and response. Is that the same as setting the Hardware.Compare.Mode?
thx,
-marcus
10-05-2010 06:43 PM
Hi marcus -
Yes, they're the same thing. It looks like the properties were changed in a recent version. You can see in the context help for that property that it's used to configure the device for Hardware Compare mode.
Since it looks like you work at NI too -- you have a blue icon next to your name -- just call my extension or email me if you have any more questions.
11-15-2010 04:07 PM
In the LV 8.6 package, the JDW Get IDCODE.vi example has an error in comment text on the block diagram.
It says: "1. Initialize the waveform, preallocating samples in memory. If desired, begin by clocking in five 0's on the TMS line to initialize the device to the TEST-LOGIC-RESET state"
Clocking five 1's will reset to TEST-LOGIC-RESET. This is what the example actually does - so the '0' should simply be replace with a '1'.
01-04-2011 12:25 PM
Hi all
I was wondering if there is a way to send JTAG Digital Waveforms generated by LabVIEW into a parallel port or USB port. I know that there is a way to use DAQmx devices with JTAG Digital Waveforms where DAQmx drivers take JTAG Digital Waveforms and transfer that into physical signals which is then send to UUT. I really am in a need to try to mimic whatever a DAQmx can do to make that happen with a parallel port or usb port. I would really appreciate if you can help me it is very urgent. Also I would really appreciate if there is another cheaper device or a way that can replace DAQmx so I can send those JTAG signals to my UUT. By the way I am using LV8.6.
Thanks
03-16-2011 03:35 AM
Hi Everyone,
I wanna know, if "JTAG Digital Waveform Reference Library" cna be used with R-Series cards (specifically PXI-78XXR series).
And the main concern is to implement/establish communication using JTAG interface (IEEE 1149.1).
Please help me with the issue.
--
Thanx and Regards
03-16-2011 09:53 AM
Hi moderator -
As explained in the Serial Protocol Communication whitepaper, JDW is designed to work only with vector waveform devices like NI DAQ and HSDIO. It does not work with RIO (R-series, FlexRIO, cRIO) devices.
03-16-2011 12:21 PM
Thank you David for your reply....
Could you guide me, I've PXI 7833R and want to implement JTAG interface to perform 'Boundary Scanning', is there any knowledge base or example or case study.....?
05-24-2011 10:33 AM
Hi Christian,
Thanks for the JTAG Digital Waveform Library. Really it reduces the protocol development time drastically.
I am using your example VI called HSDIO JTAG - Core Features.vi to generate JTAG signals TCK, TMS, TDI and TRST and acquire JTAG signals TCK, TMS, TDI, TDO and TRST with HSDIO PXI 6552 card. I have the following question in the above example.
What is the meaning of the following control JTAG channels in the example.
Can I expect TCK in channel 0, TMS in channel 1, TDI in channel 2, and TDO in channel 3 of the HSDIO card. Otherwise please suggest me how to map the JTAG channels with HSDIO channels.
I am using the same JTAG channels configuration for my program but I am getting