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CLD Success Package (Solution #9 rewrite)

I rewrote the CLD Exercise 9 solution from scratch - funnily enough I did this as a teaching aid before I knew about the call for new solutions!

 

The exercise is the 'Step Sequencer with Elapsed Time Express VI Timer':

leahmedwards_0-1593370044132.png

 

 

I have noticed the following advantages in my solution over the original:

 

  • State data is only listed in one place - more maintainable
  • Better screen space usage/ smaller diagram
  • More comments targeted at pre-CLD level
    • Made the comment previously suggested about implicit references
  • Fewer unnecessary wire bends
  • Fewer unnecessary 'select' functions
  • Example solution had changed Elapsed Time indicator to a DBL in solution - not allowed!
  • Clear background on wire labels
  • Corrected 'stat(e)' typo in ctrl+I documentation of solution
  • Type def control has more descriptive name

 

The project (with original and proposed solutions) is saved for LV2015. Let me know your thoughts.

 

~ Leah

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Thanks. Haven't looked at it in details, but please don't post a front panel picture with "continuous run" activated! 😮

Also, If you enter the URL correctly into the diagram comment, it will turn into a clickable link.

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@altenbach wrote:

Thanks. Haven't looked at it in details, but please don't post a front panel picture with "continuous run" activated! 😮


Oops - you got me with the run continuous! I wanted a quick screenshot to remind people which one it was but happened to have the exercise with the empty block diagram open and didn't want to see the grid lines... Now my laziness has come back to bite me.🙃

 

 


@altenbach wrote:

Also, If you enter the URL correctly into the diagram comment, it will turn into a clickable link.


 

Thanks for taking a look. The link was blue and clickable in my 2018 version before I backsaved it - unfortunately I don't have 2015 on this PC to fix this version. But I can try saving it again some time.



 

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@leahmedwards wrote:

@altenbach wrote:

Thanks. Haven't looked at it in details, but please don't post a front panel picture with "continuous run" activated! 😮


Oops - you got me with the run continuous! I wanted a quick screenshot to remind people which one it was but happened to have the exercise with the empty block diagram open and didn't want to see the grid lines... Now my laziness has come back to bite me.🙃




Next time, use Ctrl+M to show the runtime window.


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One if the reasons I have not rewritten much is the rigid requirements that the template cannot change. I always cringe looking at these templates. Properly rewritten, the "autoreset" should be a switch or checkbox, the step LEDs should be a radiobutton indicator, and all controls should have better labels and boolean text. A button labeled "Stop VI" containing a boolean text of "OFF" is quite unusual. Time indicators should have a time format.

 

I guess down-saving does not properly retain URLs in diagram comments. Wasn't aware of that.

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@crossrulz - Thanks for the tip, very useful.

 

@altenbach Agreed, the exercise template is not ideal but like you said, changing it is not allowed. The funny sizing of the string indicator has me itching to neaten it up... Anyway, are there any major improvements that could be made to the code, apart from the hyperlink?

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I have my own style, so don't listen to me 🙂

 

  • I probably would keep the error wire horizontal without bends and rearrange the rest a little differently. SAme for the state wire
  • I would also get rid of that "boat anchor" of an express VI and just use "high resolution relative seconds" and a tiny amount of code (example).
  • I don't use "reinit all" ever. I typically set to "clear indicators when called" (execution option) and all important controls via locals (not need once built as exe). In this case only the time target and autoreset need to be defined, the rest are indicators or latch booleans.
  • For the step times in the case structure, I would take it out of the case structure and use the state to index into an array of times. easier to validate than cycling through a stack of cases.
  • I like the terminal labels on the side.
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Here's how my version might look like (Of course we need some comments back).

 

 

altenbach_1-1593480862699.png

 

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Thanks for sharing Altenbach. I like how you can see all of the code without having to flick through case structures. I guess the 'terminals on the side' makes it even more printable.

 

In reply to the style advice:

  • I had a go at straightening out the error/state wires on mine as that's quite a common style rule people follow. Results below.
  • Seeing as the project is called 'Elapsed Time Express VI timers' I think the Express VI will have to stay.
  • Re-init all isn't something I'd normally use at work (as it's not clear to other developers what defaults have been set) but it got me through my CLD back in the day. So I'm tempted to leave it in and possibly add another(!) comment on alternatives like your 'locals in a flat sequence structure' solution.

leahmedwards_4-1593494361040.png

 

 

 

 

 

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Just realised that I never uploaded the files for that updated neater version. Here they are saved for LabVIEW 2018. 

 

 

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