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CSLUG - Central South LabVIEW User Group (UK)

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Register Map Data Structure

Has anyone come up with a good way to define a series of register maps?  I was thinking of creating a set of polymorphic vis contains a strict typedef refun...I'm sure it'll work but just wondered if anyone has any other smart ideas.  In the past I've used ini files to contain the registers definitions, it's nice to have the definitions in a text file but a bit of a pain to use...

Here's an example register map....

Module

Index of Special Function Register (SFR)

Module

Specifier

00000

00001

00010

00011

00100

0101

00110

00111

01000

01001

01010

01011

01100

01101

01110

01111

AP

01000

AP

APC

PSF

IC

IMR

SC

IIR

CKCN

WDCN

A

01001

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

PFX

01011

PFX

IP

01100

IP

SP

01101

SP

IV

LC0

LC1

DPC

01110

Offs

DPC

GR

GRL

BP

GRS

GRH

GRXL

FP

DP

01111

DP0

DP1


So in this case the register is 10 bits made up the module section + SFR section.

There will be multiple registers with a similar format.  I was thinking that each register will have a set of polymorphic vi's that would select the "Module", each module vi would then expose the available registers to the programmer.

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