Hello,
I am using the myRIO 1900 and Labview 2014 with the MyRIO toolkit and FPGA module. I would like to add support for additional encoder pins (replace some DIO pins with encoder pins) by creating a custom myRIO FPGA personality.
I followed the following forum post: <https://forums.ni.com/t5/Academic-Hardware-Products-myDAQ/Using-more-than-4-quadrature-encoder-input...>, however, I need some additional guidance.
Following the instructions in the post, I created a myRIO custom FPGA project. From there, I successfully edited and compiled the FPGA Main Default.vi file (see attached). Then, inside the Main RT.vi file, I linked to the edited FPGA Main Default.vi by configuring the Open FPGA VI Reference VI. The post explains that after these steps, any express VI's or advanced I/O VI's should now use the edited bitfile. The post says that for any added channels (i.e. my new encoder channels), you must use the FPGA Read / Write nodes. Where my questions lie are in how to use these FPGA Read / Write nodes to make the existing myRIO encoder VI's to work with the new encoder channels. After creating an updated bitfile, how can I use the existing myRIO encoder VI's to work with the newly reconfigured encoder pins?
