I am working on a project which will requires a GCPW structure, forcing me to use differential ports in Axiem. That lead to me to a question regarding the port accuracy of differential ports in Axiem as compared to wave ports in Analyst. As I was doing some reading about ports in Axiem, it seemed pretty important to de-embed/calibrate the port in order to remove the edge effects. However, when I use differential ports in axiem, it doesn't allow me to de-embed, or i am setting up the de-embedding wrong. I did two sets of experiments to compare a uStrip line and GCPW line in both axiem and analyst.
To create the differential port in Axiem i manually created the ground plane, and assigned a small section of the ground plane as the return port (-1). In Analyst, I borrowed from my knowledge of other FEM solvers, and created a custom sized wave port for the uStrip model in Analyst.
Above I am plotting the return loss and port impedance of Axiem (blue) and analyst. Comparing the two results, I suspected that the port in axiem is including some edge effects which are perturbing the results at the higher frequencies.
I did the same experiment for a GCPW structure. Created an Axiem simulation with differential ports, and an Analyst simulation with a custom sized wave port to span all metal structures.
The differential ports for the GCPW structure didnt seem to have and odd effects at higher frequencies, but the port impedance seems all over the place.
I am not sure which simulation is more accurate, or if the differential ports are adding any parasitics. I have a tendency to trust the wave ports more, but any advice or guidance would be much appreciated.
In AXIEM, de-embedding is done by extending the conductor at the port, and de-embedding back to the reference plane. For the microstrip case, unless you want to model a finite ground plane, I would recommend making the bottom boundary conductive, and using that as ground. The simulation will be a lot simpler/faster, and you can use auto ports in AXIEM to extend the line and de-embed back to the reference plane without much additional simulation time (double-click port > set Type to Auto, and check De-embed box). You do not need differential ports for microstrip. If you are doing this to replicate what you plan to do for GCPW, then you can extend the floating ground to leave enough room for the de-embedding, and still use auto ports.
If you make the line to short, then the Zin measurement looking into one port will just be looking at the 50 Ohm termination at the other end of the line, and the line impedance will not play much of a role. You are more likely to see the parasitic effects due to the discontinuities at the ports than the line impedance. For Analyst wave ports you have the option of using the Zin_Port measurement to get the port impedance; it is a cross-sectional solve at the wave port. There is no equivalent in AXIEM. One way to find the unknown impedance of a line is to place the EM structure as a SUBCKT block in a schematic, and to find the minimum |s11| by tuning (or optimizing) a variable that sets the Z0 of both ports.
Properly de-embedding GCPW ports in AXIEM is a complex topic. Since you have access to Analyst, I would recommend using Analyst and wave ports instead. Note that in Analyst, if only one of the conductors touching the wave port plane has a port, then any other conductor that touches the plane is a reference for that port. It is like short-hand for setting up a differential port. Here, too, you can get away with a conductive bottom boundary as the solid ground layer. Make sure the vias touch the wave port plane, so that all of the references will be at the same potential. Otherwise, the port will have 1 signal and 3 separate reference conductors, allowing fields to go far beyond the vias, and creating the potential for alternate modes.
Thanks for the reply! I was able to get the GCPW to uStrip transition to function as expected with Analyst. All the ports' fields and impedance seemed spot on. I had a follow up question concerning a subsequent analyst simulation using my transition.
I am working to create a power combiner when I try to simulate the full structure in Analyst I get an error:
Warning: AMR Terminated: Stopping AMR sequence. Next iteration will exceed available memory.
Running converged mesh at all frequencies.
======== Working on Port 1 at frequency 1 of 201: 20 GHz ========
======== Working on Port 2 at frequency 1 of 201: 20 GHz ========
======== Working on Port 1 at frequency 201 of 201: 30 GHz ========
======== Working on Port 2 at frequency 201 of 201: 30 GHz ========
======== Working on Port 1 at frequency 24 of 201: 21.15 GHz ========
======== Working on Port 2 at frequency 24 of 201: 21.15 GHz ========
======== Working on Port 1 at frequency 46 of 201: 22.25 GHz ========
======== Working on Port 2 at frequency 46 of 201: 22.25 GHz ========
======== Working on Port 1 at frequency 68 of 201: 23.35 GHz ========
======== Working on Port 2 at frequency 68 of 201: 23.35 GHz ========
======== Working on Port 1 at frequency 90 of 201: 24.45 GHz ========
======== Working on Port 2 at frequency 90 of 201: 24.45 GHz ========
======== Working on Port 1 at frequency 113 of 201: 25.6 GHz ========
======== Working on Port 2 at frequency 113 of 201: 25.6 GHz ========
======== Working on Port 1 at frequency 135 of 201: 26.7 GHz ========
======== Working on Port 2 at frequency 135 of 201: 26.7 GHz ========
======== Working on Port 1 at frequency 157 of 201: 27.8 GHz ========
======== Working on Port 2 at frequency 157 of 201: 27.8 GHz ========
======== Working on Port 1 at frequency 179 of 201: 28.9 GHz ========
======== Working on Port 2 at frequency 179 of 201: 28.9 GHz ========
Beginning fast frequency sweep.
Expanding solution about 30 GHz.
Expanding port 1 mode 1 solution about 30 GHz on VM 0.
Error: bad allocation
End simulate (35.23min)
I can reduce the maximum delta for |S| and get the simulation to converge, but the answer is unrealistic because I get S-parameters greater than 1. Is this really a memory issue or am i setting up the problem/ports wrong?
Thanks in advance,
I'm back from vacation and I'll be picking this up again. Please create a "targeted" project that includes only the problem. I do not want to spend time solving EM structures that are not related to the problem, and it's not easy to tell which structure is causing the problem because you did not include the .VIN file in your ZIP. It helps us greatly if you can delete unrelated/unnecessary items from the project, arrange the windows as needed to highlight the problem, and then send us a ZIP containing both the .EMP and .VIN files.