If you want to exchange a model you have to reconfigure many things. You could use Aliases to reduce the effort for the Workspace and Workspace Tools.
But in the System Explorer you can only use Aliases for Calculated Channels.
Please make it possible to use Aliases also for Mappings, Alarms and Procedures.
Make the Measurement & Automation Explorer ( MAX ) Import Assistant Window resizable, because now not all informations are visible to the user:
In most places around VeriStand, channels can be searched and filtered. However, in the channel logging pane of the simulus profile editor, one must manually dig down through the nodes and select channels independently which requires users to know exactly where the channels are in the structure. This is a pain for large systems (we have 4000 channels including CAN and 2000 channels excluding CAN). Thank you.
It would be nice to add some controls in VeriStand workspace screen objects in order to handle macros.
The two controls could be linked to a combobox which could list the content of a "Macros" directory, located under the project root.
These controls could be helpfull when you want to build a simple screen, for users without big knoledges about VeriStand.
Is there any development in improving the pallet of Calculated Channels? The new stimulus profile editor has a very large list of mathematical and logical functions while the Calculated Channels pallet is very limited. Thanks.
Also, it'd be great if the conditional could be a bit more flexible (e.g., allow multiple conditions) or be changed to a switch/case type function.
Whenever I delete a signal (whether it's a custom device, user channel, calculated channel, etc.), VeriStand goes through to delete that signal from anything referencing it. This is often nice but at times undesirable because I may plan to add it back again at a later time with a new custom device with the same signal names, for example. The auto deletion of all references means that I'd need to go back to relink all of the broken references even if the missing signal gets restored later anyway. Some of my channels are used in 20+ places.
I'd like to see VeriStand prompt me or give me an option as to whether I want to delete all references. If I choose not to delete the reference, I understand that an error will show up later if I try to deploy or run. Thanks.
Say I have profileA which calls sequenceB which calls sequenceC. sequenceC needs to access UserChannelX defined in the system definition. Currently, the only way to do so, I believe, is to pass UserChannelX into sequenceC as a parameter which means it needs to be defined as a parameter in sequenceB as well, even if it's not used in sequenceB. This greatly increases the number of arguments of a sequence which may never be used but is necessary in order to give the lowest sequence access to system definition channels. It seems like we should make sytem definition channels directly available at any subsequence level (sort of like how global variables can be referenced anywhere). Thank you.
Benefit: Simplify the process and reduce errors when using FPGA personalities
Idea: Querry the user-generated FPGA diagram and automatically create the XML file. Additionally, have some kind of editor/viewer for the XML file that would present the information similar to how it is presented in the System Explorer but allow the user to edit certain values (or just make it editable in the system explorer). Some items would be read-only (items specific to the bitfile communication) and others would be editable (heirarchy, scaling, etc).
Ultimately, the process for using FPGA Personalities would be:
- create FPGA VI using NIVS interface/template
- select interface in "utility/view" or System Explorer (XML file automatically generated)
- edit default settings if desired
Why don't we integrate PuTTY or some version of it into MAX? "Console out" is powerful troubleshooting tool for all NI RT targets and more because it tranfers vital information such as errors and IP address information regardless of whether you can find the device in MAX. It's especially useful for devices that don't have hardware dipswitches. It's a great tool, but is useless without a program like PuTTY. Hence, my suggestion remain to integrate PuTTY or some form of it into MAX.
NI-DAQmx Tasks can frequently have dozens of channels, sometimes hundreds. Renaming each channel can prove tedious when the format needs to be more complex than rootname_#, indexed from zero.
This change will allow developers to batch rename channels in a more flexible format, saving task setup time.
This idea includes:
1. Using rootname as it is now, allowing for all channels to have a common base name
2. Creating wildcards for naming channels. Each channel would then have the base name, a changeable separator character if specified, and an incremented number or character(s) specified by the wildcard. Examples include:
a. Current_ = Current_001, Current_002, Current_003...
b. Temp [AA] = Temp AA, Temp AB, Temp AC, ..., Temp BA, etc.
c. _Reactor = 05_Reactor, 06_Reactor, 07_Reactor, etc.
As a developer, I use to have several screens for Test data display, Manual panel, Model execution control panel, etc. As per to the operator any screen other than Test data display is unnecessary.
It will be really good, if we could include the Screen selection in the "User Accounts Manager" with respect to the users like shown below
This option lets the administrator to select the specific screens whichever is necessary for the operator.
Although many examples exist for VeriStand. They are not easy to find for new users unless they are shown where they are. If they have been using other NI Software , they would likely go to the Help>Find Examples option in the splash/development menu options. In LabVIEW,
This menu option does not exist in VeriStand.
Giving access to these Examples from the load screen would be helpful for new customers who are getting started and existing customers looking to do a quick test. Navigating for a specific example can be a bit tedious at times because they don't all exist in the same level. Like Sinewave Delay and Engine Demo for instance.
<Public VeriStand>\Projects\Example\Sinewave Delay.nivsproj
<Public VeriStand>\Examples\Stimulus Profile\Engine Demo\Engine Demo.nivsproj
The Project Explorer is inoperable when the System Definition File is open.
I frequently want to open the Workspace or Stimulus Profile Editor while working on the System Definition File.
This should be possible because it is already possible to let the Workspace open before you start the System Definition File.
You can not choose multiple Workspace objects to move in VS 2011, so it is time-consuming to organize the Workspace. I hope that 1. you can choose and move multiple objects at the same time 2. you can align object by alignment tool like below images.
In System Explorer, you can not change the order of items by drag & drop. It is better for users to change the order of items like Calculated Channel.
However, I guess better mapping usablitity will resolve this problems. If the mapping is like below image and the order can be changed, it is better for users to map all things.
I have a system definition of over a thousand signals. I see that VeriStand 2011 has some search functionality built in. Is there a way to search not just ni the channel names but for the use of particular variables within calculated channels? For example, if I have UserVar1, I'd like to be able to find all occurrences of where UserVar1 is used. It could be an argument in a Calculated Channel, a mapping destination, an alias, etc. Is there a search tool that can accomplish this? Thanks.
Currently, In VeriStand, you can refresh Models if you made a change or added/removed channels. I would like to be able to refresh custom devices so I do not have to completely remove it and add it again when I add or remove a channel.
Versioning is often a fairly important matter when it comes to long/large projects. When a new FPGA bitfile is generated in LabVIEW, there's a possibility to change its version (in the build specification). As a result, a parse of the .lvbitx file as text file can be used to decypher the aforementioned version (it's following the <BuildSpecVersion> tag).
Though, there's no simple way (aside of making a Custom Device or modifying the accepted tags in the xsd file)) to get this information in Veristand after importing a new FPGA personality. The version may be important, but more information about the bitfile might need to be made public in this window :
In fact, there are a bunch of information that are readable in VeriStand about the model imported (name, version...). Once more, the FPGA needs the same feature ;-)
Have a great day,