SPI bus does not have MOSI and MISO pins?

[clafollette01]

Hello!

I'm new to VirtualBench and could not find this question answered elsewhere. I'm trying to set up a SPI bus on the Logic analyzer, but the analyzer only give pin settings for CS, Clock, and "Data". A SPI bus should consist of CLK, CS, MOSI, and MISO. Am I supposed to sret up a separate bus for MOSI and MISO, or am I missing something here?

Best regards,

Cameron

[WilliamEarle]

There pinouts for MOSI/MISO are assigned to fixed pins (dig/1 and dig/2). For more information, check out:

http://zone.ni.com/reference/en-XX/help/371526E-01/vbhelp/digitalio/

[WilliamEarle]

Hrm, I may have replied a little quickly. Those lines are if you're mastering SPI with the GPIO pins.

If you're using the logic analyzer to decode a spi bus with the VirtualBench application, you can just set up a second "bus" to decode both MOSI and MISO at the same time.