SVD for FPGA target

[Phy_comm]

I need to calculate orthonormal basis of a matrix for my design using MIMO. 

I have access to MIMO application framework which gives precoding matrix after QR decomposition.

Now I plan to use this matrix as input to get Orthonormal basis of channel.

In doing so, I need to implement SVD(singular vector decomposition).

Labview Communication has SVD block for host as target but there is no such block for FPGA target though QR and other algorithms have been implemented midway through realisation of the application framework.

After few study I reached to following conclusions on getting FPGA target SVD:

1. Is there a way to look into communication suite code of SVD implemented in comm suite? If possible I can have a look and try to code FPGA version.

2. XILLINX has support of Linear Algebra Library having SVD. I can use it to get a bit file for target FPGA of Flex Rio and use it as third party IP? I need to learn this though!

3. There are methods of calculating SVD using CORDIC. Should this be tried as an option using CORDIC IP in comm suite?

[abgaber]

Hi All,

A1. We don’t know if the generalized SVD is already implemented in host based on LabVIEW Communication Suite. The QR decomposition algorithm that is implemented in the FPGA of MIMO Application Framework can be used. However, an FPGA expert is required to adopt it to save the FPGA resources and latencies. In addition, if the matrix order that needs to process is larger than 128 x 12, the enhancement needs a major effort.  

A2. In LabVIEW Current Gen, there is a node to integrate XILINX IP directly. However, in LabVIEW Communication Suite, let me check, if you can integrate the XILINX IP directly.

A3. It is worth mentioning that the CORDIC algorithms needs more resources and latencies.

Suggestion: If it is required to do the SVD per radio frame in MIMO Application Framework, the target-to-host FIFOs can be used to transfer the channel estimates to the host. In the host, the generalized SVD can be implemented using any mathematics book (A good reference is: G. H. Golub and C. F. V. Loan, Matrix Computations, 3rd ed. Johns Hopkins University Press, Baltimore and London, 1996). The required information can be transferred then to the FPGA using a host-to-target FIFO.

Best Regards

Abdo Gaber

[Phy_comm]

Dear Gaber,

Thanks for looking into details.

1. My matrix order for current setup is just 1*8 as mine is MISO system with 8 antenna at BS and one mobile user.
What do you mean by QR decomposition usage? How to I use it for full fledge SVD implementation?
I believe there should be away to check in to SVD implementation of communication suite. Please let me know if you come across.

2. If Labview supports IP integration communication suite can too. No?

3. Yes cordic would take resource and time to implement too.

4, Going by your comment on host transfer, if I transfer to host why wouldn't I use generalised SVD already there?  And won't this create delay beyond system requirements?

Regards,,

Phy_Comm

[Phy_comm]

Hi!

I manage to implement SVD both in FPGA and host domains(square and row/column vector only though).

But was bit tricked by weight calculation block in receiver side which uses QR to give precoding estimates.

I need precoding matrix as N_bs*no. of MUs. While block outputs 12 size column vector which I understand is for 12 subcarriers of OFDM, in each clock cycle. It does so for each antenna and then shifts to next resource block.

I cannot decipher how to get the N_bs* no of MU precoding matrix as suggested in theory.