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Is there a Verilog testbench for b205.v top level used in the mini

I would love a testbench for this top level verilog code.  I don't see one in the repository.

 

The Verilog source code for the FPGA on the B200mini is located in:
https://github.com/EttusResearch/fpga/tree/UHD-3.9.1/usrp3/top/b205

 

Any help is appreciated,

 

Michael

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Hi Michael,

 

Have you attempted to reach out to the owner of the git server, achaudhari?

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No I have not.  I guess I will try now

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