NI Home > Community > NI Discussion Forums

Signal Generators

Showing results for 
Search instead for 
Do you mean 
Reply
Member
ilyak
Posts: 70
0 Kudos

-1074118136, PLL could not phase-lock to the external reference clock.

I have a PXIe system with three daisy-chained NI-PXI 5673E generators. My code configures frequency, power, IQRate, phase offset for each. Then it tries to commit the changes using niRFSG_Commit for all three instruments. The first one runs fine the second dumps this error:

 

-1074118136, The AWG reported the following error:
PLL could not phase-lock to the external reference clock.
Make sure your reference clock is connected and that it is within the jitter and voltage specifications. Also, make sure the reference clock rate is correctly specified.
Device:  PXI1Slot12
Status Code: -200245

 

Any ideas why this might be happening?

 

Thanks so much.

Active Participant
EEsRULEtheWORLD
Posts: 205
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

Hi,

 

In order for us to narrow the source of this issue down, it's important to try some basic tests:

 

  • Do a self-calibrate on your 5450.  This can be done in Measurement and Automation Explorer (MAX).  You will need to right-click on your device and select Self-Calibrate.
  • Run an example program.  Something like Fgen Arbitrary Waveform.vi would work with your card.  If you're using LabVIEW, you can find this example in the NI Example Finder (Help»Find Examples) in the following folder path:  Hardware Input and Output»Modular Instrument»NI-FGEN»Arbitrary Waveform Generation.
Let me know if any of the above tests also generate an error.

 

Regards,

Sara Lewandroski
Applications Engineer | National Instruments
http://www.ni.com/support
Member
ilyak
Posts: 70
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

Hello Sara:

 

  1. Just to clarify: I have three daisy-chained PXI-5673E generators.
  2. Self-calibration passed on all.
  3. I tried to operate them with the test panels provided by MAX, with the clock source set to ClkIn, and still get the same error mentioned before. On all three instruments.
  4. Example didn't run yet.

 

-Ilya.

Active Participant
EEsRULEtheWORLD
Posts: 205
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

Hi Ilya,

 

The PXI-5673E is made up of three modules:  5622, 5601 and 5652.  I need to determine if the source of this issue is the 5450 (which the error message is referencing).

 

  • Try running the FGEN Soft Front Panel and set the clock source to the Internal clock.  Do this for each of the 5450 cards.  Is an error message thrown?
If the above test works, try swapping the 5450s with different combinations of up converters and LOs.  Run your code again.  Does the error still persist with the "second" system?  Or does the error occur with the "first" or "third" system?  Take note of how your are swapping the 5450s and where exactly the error occurs.

 

Regards,

Sara Lewandroski
Applications Engineer | National Instruments
http://www.ni.com/support
Member
ilyak
Posts: 70
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

Hi Sara:

 

  1. The FGEN soft panel with internal clock source runs without any errors on all tree 5673E. However, I was measuring the output signal and it isn't what was expected (for example, 1GHz signal shows up as 715MHz on the frequency counter).
  2. What you are suggesting is to try different combinations of pairs of 5450+5611? I just have one 5652 RFGEN. I'll try to do this, but is there any more scientific method to figure out which instrument isn't working?

Thank you,

-Ilya.

 

 

Member
adsfsa
Posts: 1
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

Hi Ilyak

 

My first thought would be to double check all the cables used to pass the LO signal and 10 MHz reference signals to the slave NI 5673s.

 

You can see a picture of what your setup should look like here: http://zone.ni.com/devzone/cda/tut/p/id/9127

This page is a subset of the MIMO Test page, which has a lot of info on setting up the modules in a phase coherent system.

 

Also, If you still have an issue, this topic would best be posted on the RF Measurement Devices

forum.

 

Jerry

RF Systems Engineer - National Instruments

Member
ilyak
Posts: 70
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

Hi Jerry:

 

  1. From the first check the connections are correct. Same as the diagram.
  2. The first flexible SMA-SMA cable that barely fits was a suspect. But I replaced it with a known cable and result was the same as before.

Ok, I'll post it to RF Measurement Devices forume then.

 

Thanks a lot,

-Ilya.

Member
ilyak
Posts: 70
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

The problem was resolved.

  1. I didn't use the correct clock source.
  2. I didn't initialize the instruments in the right order.

Thanks all for help.

-Ilya.

Member
ilyak
Posts: 70
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

This error has come back. What is strange about it is that now it is generated from niRFSG_WriteArbWaveformComplexI16

  1. Is there anything special about this function?
  2. Why does it generate this error in the first place? There was no generation done yet.

-Ilya.

Member
Jonathan_S1
Posts: 137
0 Kudos

Re: -1074118136, PLL could not phase-lock to the external reference clock.

Hi,

 

I'd like to confirm that the hardware is in fact working correctly at this point, and the best way to do that is with some basic initial troublehsooting steps.

 

Does the device pass self test in MAX?

Can you open up the NI-FGEN Soft Front Panel and generate waveforms?

 

The error doesn't seem like it should be related to that function.  I would expect to see it returned when configuring the sample clock or committing the task to hardware.  Also, are you exporting any signals?  It may be a longshot, but not knowing too much about your code you could also check out this KB to see if it's relevant.  The error message is different, but the code is the same

 

Thanks,

Jon S

Applications Engineer
National Instruments