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sbrio-9651 IO length matching

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How did your project go?

 

I'm facing a project kind like yours, we will acquire at 1GSPS(maybe faster, faster is always better) and process only 500 samples or so, and wait trigger for next acquire start, the trigger rate will be at about 200kHz.

 

I don't really need every sample to be send to host, only the peak value is what I need, so I can see there is not much hard to do when I processing data, the question would be if I will be able to acquire data at the rate of 1GSPS (or maybe more).

 

I already noticed it doesn't seem feasible to use a JEDSE204B ADC in SBRIO9651, since we don't have GTP port onborad, so the solution should be based on a paralle high speed ADC.

 

If you are doing OK with 9651, it would means 9651 can handle 500M data rate with LVDS, which is a good sign for me.

 

Thank you!

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Hello jiangliang,

 

Since the previous post was from a couple years ago, it might be a better idea to private message abadobid. Otherwise, starting a new post could be more effective in getting input from other users that have tried a similar project.

 

Eric

National Instruments

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