01-20-2012 05:07 AM
May be this is silly question for most of you. But I have very less knowledge about the basic electronic concepts(FPGA, Real Time) in cRIOs. I know that FPGA
can be used for generating circuits within the chip which helps in doing some logical functions.
I just started working in the cRIO. My question is that we have I/O Modules which does all input outputs for the application. Then what is the purpose of I/O in FPGA.
Lets consider that we are inputting RTD for an application. In that case the module NI 9217 itself outputs 24 bit data of the RTD measurement which can be process by the LabVIEW VI. What will this FPGA in between the I/O Modules and Processor will help in? Also that I wanna know what kind of communication is used to send data between modules, FPGA and host.
Thanks in advance
Solved! Go to Solution.
07-22-2012 11:34 PM
It seems no one out there to reply. Here, http://zone.ni.com/devzone/cda/pub/p/id/1467 , is what I learnt about advantages of FPGA in measurement. FPGA drastically reducess our post processing time and data-handle. When we build the FPGA for post process in cRIO, it does all processing works in cRIO and sends us the final result what we need to display to the user. Thus, the transfer of measured data to PC is eradicated and the post process is done as fast as measurement is done.
I will find out answers for other questions and update it here.
07-23-2012 04:38 PM
Sorry you didn't get an answer to your original question. You are correct about the advantages of the FPGA though. Like you said, if you build pre-processing into the FPGA, you can offload a lot of potentially CPU-intensive calculations off of the host processor. In addition, the program running on the FPGA is highly deterministic and can execute code very quickly. So if you're building some kind of watchdog or time-critical portion of your application, the FPGA is a good place to put it.
To answer your other questions, the communication between the modules and FPGA is generally done over SPI and data can be transferred between the FPGA and host through DMA FIFOs which operate over the PCI bus, or single-point register access using Read/Write controls in the FPGA Host Interface. You can also use interrupts to signal actions between the FPGA and host.
Hopefully this helps but let us know if you have any other questions.