02-22-2017 03:56 PM
I'm looking at the Mezzanine Card Design doc and it looks like FPGA Sample Clock to DIO Out is 19 ns at 20 pF. Lets say I create a derived clock at ~52.6 MHz (19 ns period) and I have code that looks something like this:
I can imagine that given the 19 ns uncertainty, I'll be able to guarantee that the output will go high (or low) by the end of each period giving me an output clock rate of ~26.3MHz. Is that the best I can guarantee? FYI, in my application, I'm making a custom RMC card with a device that needs an external clock signal.
02-23-2017 04:29 PM
Hello nanocyte,
Which RMC are you using or emulating most closely? Which sbRIO do you intend to use with it?
Zoe B
02-23-2017 04:44 PM
Hi nanocyte,
Assuming you are developing with the sbRIO-9607/27, there are a few recommendations I have.
1. With the sbRIO-9607/9627, we officially support importing/exporting clocks. With this method, you will not have to program the clock in LabVIEW FPGA yourself. You can set this up through the sbRIO CLIP Generator. While the presentation uses the SOM (sbRIO-9651), the same applies to the sbRIO-9607/9627.
2. There is a much more extensive design guide here that I would recommend referencing for the design.
3. There is a Hardware Developers Community that is also useful for tips/tricks/document/questions.
02-23-2017 05:11 PM - edited 02-23-2017 05:15 PM
ZoWithTheFlow, I'm not clear on what it matters which card I'm emulating. Lets say it's like a 9694. My sbRIO is a 9627 but the doc seems to be model independent.
Eric,
The document I linked to seems to be referencing the hardware capabilities so I wan't so concerned with how to generate that signal. I've been able to synthesize FPGA designs that are much faster than 52MHz so I'm not too concerned with the software part of the generation. Would using the export ability improve the hardware performance? It's my preference to stay away from generating CLIPs. I've done it before and it's laborious. I'm glad it's there if I need it though.
I scanned through the RIO MEZZANINE CARD DESIGN GUIDE and I didn't see any info regarding the maximum performance of the user defined IO. Am I missing something?