Implementation of duty cycle controller NI9474 cRIO

[westlund]

Hi,

I'm extending a previous tested program that used analog output and the FPGA sin and White noise functions to use PWM instead with feedback.

But I'm having problem with getting any signal out when I implemented it directly on the FPGA, not even the 0.5 offset that should always be there.

This is how it would look like in Matlab

How would the correct way to implement it be? It should handle arbitrary waveform up to 1000 amplitude and 5000 Hz.

[nanocyte]

Can you post your code?

It's not clear where you're having trouble. Is your trouble converting an analog value to PWM? Here's what I came up with after a quick search:http://www.ni.com/example/26499/en/

[westlund]

I don't have any input at the moment.

Excitation type 0 and 1 are the old analog out. I'm trying to implement the same in 2 with some extra math(PWM.vi) and control to use PWM instead. It should not give the same output because the new one is connected to a different system.

I'm only getting 0 out at the moment.

So my problem is more toward how I should implement it on cRIO to generate a sine wave or white noise and send it through some math functions and output it as PWM.

[nanocyte]

PWM control loop code will never run because it is dependent on the completion of Output Control Loop which never finishes because of the constant false wired to the loop stop condition.

You can, instead, use a local or maybe, if you are using 2017, you can use a channel wire.

[westlund]

I had some time to test it last week after the compiler manage to compile... I moved "exitation type" and "mode" outside the output control loop. Only got a ONLY high on the first output, nothing on the second.

"constant false wired to the loop stop condition." That's the intend so it never stops iterate the loop.

[nanocyte]

You might want to post your updated code to clarify what you're setting for the mode and excitation type. I noticed you have 0.5 being added in to duty in the picture you programmed but in your code you have 0.5 added to the PWM phase. Try adding an indicator to "duty" so you can see what duty you should expect. You might want to add some dummy indicator so you can see if your loop is running too. It could just be an indicator of the iteration count or a boolean that just toggles on and off.

[westlund]

An update after starting investigating this again. Using a local variable solved the problem with communicating the change of mode in different loops.

Now I'm trying to make the function for generating the signal to work. I can't figure out a way to get a good sinusoidal, send it to a function that has sqrt() and d/dt in it. The result is a voltage level that I need to convert to a duty cycle of the PWM.

I tried to do it on the FPGA first but fixed point, d/dt and sqrt() seams to be too inaccurate and no signal is exiting. One problem is that the FPGA sinusoidal block only generates integers, so a low amplitude signal looks like a square wave. And then the d/dt doesn't work correctly.