How to structure project for multiple FPGA deployments?

[rbardsley]

I am constantly having to make multiple projects to support what is (basically) the same code deployed across multiple NI platforms. Our robot is now based on an sbRIO, but I use a CompactRIO for desktop development. My project has 1 FPGA vi and 50 or so RT vis. The RT vis are common across the two platforms as I only have to recompile the FPGA vi for each target. 

Is there a best practice for setting up a project that would allow me to keep my common RT vis in a central location and then let me easily tell the "build compiler" which platform (i.e. which FPGA vi) to deploy? I have found target folders, but can't seem to avoid having to duplicate the RT vis.

Thank you for your help!

Ryan 

[dwisti]

It seems NI has a 1 target 1 project policy.  The project environment does not scale well even with identical cRIOs.  I posted about this back in 2006.  Here the link to the post:

Two cRIOs with the same code in 1 project

I've also made suggestions in the idea exchange to improve the project enviroment.

Remove restristions on FPGA target names

[Christian_L]

One possible solution to get around this limitation is to build a class interface to your FPGA VI and use inheritance and dynamic dispatch to handle the different FPGA targets.

You would build a parent class which defines the different VIs/functions that you want to call in your RT application. You then develop two classes inherited from the parent to build the implementation for each of those functions for each of your FPGA targets. In effect you build two parallel APIs.

In your RT application you create an object of the appropriate type (one of the two child classes) depending on which target you are running. The object is passed to the different VIs defined by the parent class. Under the hood LabVIEW will call the implementation of one or the other child classes depending on the object type.

Incidentally LabVIEW R&D is working on a new feature to simplify this process. Stay tuned.

[Ben_S]

If you want to group the same VIs under multiple targets in the same project, you could use Auto-Populating Folders under each target pointed to the same folder on your hard drive. Also, In your RT code you can use the OpenFPGA VI Reference to choose which FPGA VI is being opened on the FPGA.