From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.

We appreciate your patience as we improve our online experience.

Real-Time Measurement and Control

cancel
Showing results for 
Search instead for 
Did you mean: 

Feedback on Getting Started with CompactRIO - Logging Data to Disk

That is a shame because it came back....Smiley Sad. 1 channel worked perfectly but I added a couple more to test and boom 2519. Labview could not load the TDMS file open....I turned off the compact RIO and back on, works fine...??? would be nice to know what that is about, but at least it works. Smiley Happy

0 Kudos
Message 91 of 108
(1,321 Views)

Hello all,

 

I am using a cRIO-9035 with NI-9205 module to get machining force measurement data. I am using cRIO for the first time, so I followed the tutorial "Getting started with compact RIO - logging data to disk for getting the signal. I want to get about 150-200 sample data per second. (For that I understand I need to get data every 5000usec?)

 

The first problem is I have a lot of variations in my acquired data while i am putting one constant value. That is why I tried putting a low pass filter to reduce this variation, but then i realize this is only post processing, there must be something wrong before that.

 

The second problem is that the channels are giving wrong and interconnected values, when I change one voltage value, the others change as well while I am doing nothing to the other channels. Please check the picture. First values were 0, 2.7. 7.6, i changed the 7.6 V value to 0.8, and all three changed. Also all the values are wrong.

 

I hope I put everything in correct order in my project, so a view of my project file is given as well.

 

Also I was thinking of getting a time related(with the computer time) data, so that i can know later at which time I did my experiment and correspond my other experimental data to the force data. Is there any way to do this? I don't know how to put it in the graph and/or TDMS file at the same time as the data acquisition.

 

Thank you in advance

JP

Download All
0 Kudos
Message 92 of 108
(1,219 Views)

Hi Jonto,

 

with regard to the second problem, the 9205 modules do exhibit cross-channel coupling on inputs that are not driven by a source, or otherwise terminated. Also exceeding +/- 10V on any channel will upset the readings on all other channels.

 

Have you considered using the scan engine to perform the FPGA interface ? It makes the cRIO much easier.

 

cheers,

 

Julian

0 Kudos
Message 93 of 108
(1,211 Views)

Dear Julian,

 

Thanks for the reply. I am using a force transducer for measurement. But I didn't understand "driven by source or otherwise terminated". Can you please explain this?

 

Also any suggestions on how to solve the problem?

 

Thanks in advance

JP

0 Kudos
Message 94 of 108
(1,203 Views)

If any input terminals are left floating (not connected to anything), they will read a similar voltage to the one before it..

0 Kudos
Message 95 of 108
(1,186 Views)

It is a load cell for the force transducer ? what type of load cell amplifier are you using ?

0 Kudos
Message 96 of 108
(1,184 Views)

Dear Julian, 

 

Thanks for the reply again. No, none of the terminals are floating, and right now I am not using a force transducer. When I first setup the transducer with an amplifier, it was giving incorrect values, so to correct the values before I put the transducer, I am using signal generator.

 

BTW, I think now I know that there is a problem on RT side. Yesterday I tried to measure direct from the FPGA and this is what happened-correct values!!!(screenshot); at the RT-FIFO the readings are just as wrong as usual. I have checked for data type mismatch, but that is also not a problem (screenshot).

 

Could there be something else going on in the FIFO?

 

Regards

JP

 

 

0 Kudos
Message 97 of 108
(1,176 Views)

sorry, I don't have any insight into the fifo, as I generally use the scan engine..

0 Kudos
Message 98 of 108
(1,160 Views)

I have followed the steps mentioned in the tutorial. When I use the simulated I/O, I see the FPGA VI works(checked using probe). When I use debugging tools in RT VI, I see that it works(using signal flow tool) but fails to invoke the FPGA VI. So, the waveform graph reads zero all the time. I use a 32 bit machine, so I use cloud compile service to compile FPGA VI. I am attaching the VI. I am sincerely looking forward to some help.

Download All
0 Kudos
Message 99 of 108
(998 Views)

What is your expected output? There are several missing VIs in your project that make it difficult to determine the desired behavior. If you compile the VI and run it with real I/O, do you see different behavior?

 

Nick B.

Applications Engineer

National Instruments

0 Kudos
Message 100 of 108
(987 Views)