ETH0 and ETH1 on SOM Dev Board (sbRIO-9651)

[User5551212]

It appears that the xemacps 1.00a Ethernet driver does not support JumboFrames. (ethtool -i eth0).  

# ifconfig eth0 mtu 9000

ifconfig: SIOCSIFMTU: Invalid argument

😞

http://forums.xilinx.com/t5/Embedded-Development-Tools/Ethernet-XEmacPs-driver-Transmit-buffer-exhau...

Some others else getting similar performance with this driver.

[ferencr]

So is it the case that even for eth1, the transfers go through the RT?

Would it be possible to stream data on eth1 using ONLY the FPGA? In my application, data would be acquired and processed in the FPGA.

[nico1981-2]

Hello,

how to enable jumbo frames? via MAX?

This would help me a LOT!

Best regrads,  and thank you

[aflojo]

HI nico1981-2,

What target are you trying to enable jumbo frames for? 

[nico1981-2]

sbrio 9651

As far as i know, both sides of a tcpip communication need to support jumbo frames... Our PCs do that, but how to set this up for the SOM 9651???

[DangerDave]

Hi nico,

I've been researching your issue and based on the following article, I haven't found an official means for configuring your device for JumboFrames.  

However, these targets are Linux based and thus can be configured using commands like any other Linux target as described in the following article:

Linux Configure Jumbo Frames to Boost Network Performance / Throughput

http://www.cyberciti.biz/faq/rhel-centos-debian-ubuntu-jumbo-frames-configuration/

Please keep in mind, this may not be supported by NI.

[lucamonopoli]

good morning,

is it confirmed that with eth1 or eth0 perfomance reach 80MB/S  using jumbo frames?

best regards

lm

[bstreiff]

The Ethernet MACs in the Zynq-7020 (the SoC used on the sbRIO-9651) do not support jumbo frames.

This is noted in the Zynq-7000 Technical Reference Manual, under section 16.1.5:

16.1.5 Notices

...

Jumbo Frames

Jumbo frames are not supported.

[lucamonopoli]

hi ,

did you evaluate this doc?

http://www.wiki.xilinx.com/Zynq+PL+Ethernet

br 

LM

[Spex]

Hi Luca,

The document you referenced demonstrates multiple mechanisms for implementing Ethernet interfaces within the Xilinx Zynq-7000 family.  The specific implementations are on the ZC706 evaluation platform, which includes a Zynq-7045 SoC.  

The specific implementations (b and d in your link) that support Jumbo frames involve implementing a soft IP for a Gigabit Ethernet controller in the PL (FPGA) of the SoC.  I don't know how large that IP is, but it appears to require hardware Gigabit Transceivers to create an SGMII interface, which are not available on the Zynq-7020 contained in the sbRIO-9651 SOM.  See Figure 4 of Xilinx XAPP 1082.

Furthermore, connecting the Linux PS drivers to the GigE soft IP would be a fairly large and disruptive change to the Zynq core (boot loader) configuration and software. I'm not an expert in the complexity of the dependencies within the complex Zynq SoC, but the AXI connections required for the GigE soft IP may also conflict with the AXI connections required for the NI infrastructure of bitfile loading, DMA FIFOs, Host Memory Buffer, and front panel (register) writing and reading.  

This causes me to evaluate supporting jumbo frames on sbRIO-9651 as not-feasible.  This is not work that NI is currently planning to explore further with the sbRIO-9651 SOM.

What is the problem you are looking to solve via jumbo frames?

Regards,

spex