NI 5603 IF Data to NI 5761 A/D Port

[RichieA]

Hello,

I have a Vector Signal Analyzer composed of the 5622 Digitizer, 5603 Downconverter, and 5653 Synthesizer.
I also have a 6674T Timing Module hooked up to an atomic clock and a 5761 Card.
Instead of going directly to the Digitizer, I'm currently trying to feed the I/Q IF data from the downconverter to the Ch0 input of the 5761 card (A/D)
in order to process the data immediately in the FPGA.

To get to the point, I'm trying to synchronize the clocks between the VSA and the 5761 together with the timing module,
such that I'm able to obtain the correct number of samples at a certain sampling frequency at the 5761's input.
What would I have to do to exclude the digitizer and have the 5761 in place of the digitizer?
I'm quite new to using NI RFSA tools and Timing Module in Labview, but I have included the VI I'm trying to execute on the host side for at least
some visual idea.

Richie

[JoshY]

Hi Richie,

It should be possible to replace the 5622 with a 5671 digitizer. For more information on how to do this, please reference this KB. You can also refer to the example in the NI Example Finder called RFSA Downconverter with External Digitizer.vi which gives a basic structure of what to do. Be sure to check the RFSA Help File to see what IF frequency you can expect to pass out based on what RF frequency you are measuring.

As for synchronizing the devices to your timing card, this will be very similar to using the 5622. As you can see from the Getting Started Guide of the 5665, the Ref Out of the 5653 is connected to Clk In of the 5622. Just like how you pass IF Out to the 5671 instead of the 5622, you can pass Ref Out to the Clk In input of the 5671 as well. This will synchronize the 5653 with the 5671. To synchronize both to the 6674T, you can pass out a clock from the 6674T to the Ref In of the 5653. There are examples online for how to export a clock with a timing card.

I hope this is helpful!

[RichieA]

Josh,

Is it possible to generate 2 different clocks? 1 for generating the sampling frequency at the 5761's Input and another to generate a clock for the synthesizer. I would assume the downconverter does not need a clock.

I was able to find the help file for the IF output frequency:
http://zone.ni.com/reference/en-XX/help/372058L-01/rfsacref/nirfsa_attr_if_output_frequency/
I'm constrained by the RF in terms of downconverting the IF. Is there a way to modify the LO/Synthesizer to attain a desire IF?

Many thanks,
Richie

[JoshY · Accepted solution]

Hi Richie,

It's possible to generate two different clocks, but you shouldn't need to. The best way to do it would be to pass the clock from the 5653 synthesizer's Ref Out to the 5761 digitizer's Clk In. More information on this can be found in the getting started guide for the PXIe-5665. You would just replace the 5622 with the 5761.

The LO is typically set to output a certain IF signal depending on the RF input. I don't believe there is a way to change this, but you can set your digitizer to expect the correct values.

Regards