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Timebase synchronization issue with PXI 6713

As indicated in another post, I need to use a common timebase to all cards within my PXI chassis to synchronize my acquisition/generation DAQmx tasks.
I performed that successfully by setting timebases of all boards from the 20MHz timebase of a E-series DAQ board.
 
I have another system setup where I do not have E-series DAQ boards but only M-series. In this case, I tried to synchronize all the cards with the 10MhzRefClock of a PXI 6254 board. It seemed to work correctly, until I looked at the analog output signal of one PXI 6713 board.
 
This device has 8 analog outputs, I performed as for DAQ boards : I set its timebase to a 10Mhz clock. When I have at least two outputs with hardware timing I observe on scope really weird signal : nothing is visible when all outputs are left to zero volt, but when another voltage is set, the output toggles at very high frequency between 0V and the setting voltage. When two outputs are set to values different from zero, the output also toggles but between these two settings...
 
I thought it was a board failure, but I checked with another PXI 6713 and the behavior is the same.

When synchronizing with a 20MHz timebase, everything is fine, but 10MHz clearly shows this issue. I checked the 6713 documentation, and it seems possible to use a timebase different than 20MHz.
I attached a VI that illustrates the problem : I create a DAQmx task containing 2 AOs, where 10MHz timebase is taken from a M-series DAQ board. A hardware timed single point timing is configured and outputs are updated in a while loop. If you connect a scope to the first analog output, you will see the phenomenon.

Everyting is fine when you select a 20MHz clock as a timebase. 10MHz leads to this issue. I also tried to synchronize through PXI backplane clock (i.e. /6259_1/PXI_Clk10) but it leads to the same problem.
 
Please note that using the same 10MHz synchronization on DAQ cards (PXI 6040E, 6071E, 6254, 6259...) for AO works perfectly. I only encountered this problem with PXI 6713 board.

Message Edité par Inpriser le 08-18-2006 02:54 AM

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Inpriser,

 

You wanted to use the PXI 10MHz clock to synchronize to 6713s using the PXI capabilities. I’m afraid that since the AO series doesn't have a PLL, you won't be able to use the PXI 10 clock.

 

I made a few search and found this:

 “Neither the 6713 nor any of the AO series support PLL synchronization. However, the M-Series does, though in that case you are limited to a smaller number of analog outputs. Regardless, the best option is using an Arb or other card that can use the Star Trigger, or an m-series device with PLL synchronization capabilities.”

 

 

For more info’s about how to deal with PXI and PLL, please check this forum:

 

http://forums.ni.com/ni/board/message?board.id=170&message.id=11986&requireLogin=False

 

I’m sorry to disappoint you, hoping you’ll manage to deal with that,

 

Regards,

BRAUD Jean-Philippe
Field Sales Engineer - Nord et Centre France
LabVIEW Certified Developper
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Hello Jean-Philippe,
 
Thanks for your reply.
I do not think this issue is related to PLL capabilities of the PXI 6713 card. I use the same technique to configure analog outputs of E-series DAQ board, a card that also has no PLL synchronization, and it seems to work correctly.
In the PXI 6713 user manual it can be found :
 

The NI 6711/6713/673X can use either the internal 20 MHz timebase or a timebase received over the RTSI bus. In addition, if you configure the device to use the internal timebase, which is software-selectable, you can program the device to drive the internal timebase over the RTSI bus to another device that is programmed to receive this timebase signal. This clock source, whether local or from the RTSI bus, is used by the device as the primary frequency source. The default configuration is to use the internal timebase without driving the RTSI bus timebase signal.

So synchronization of this board with another source is supported, and nothing indicates that 10MHz is not suitable.
It would be nice if someone could check my attached VI and observe the same issue. The setup is quite simple.
 
By the way, I may contact NIF about this along with other issues...
 
 
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