08-02-2012 12:58 PM
I would like to reset my block memory to all zeros (only once) when the FPGA code is run. In my past experiences, this was not done by the "IO Module\Initialization Done" FPGA I/O NODE. To alleviate this, I used a SCTL which runs through each address of the block memory and stores a zero. The approach works great, but I would like to save some space since we will be quadrupling the size of the code in a couple of months.
IO Module: 5761r
Thanks for looking!
Solved! Go to Solution.
08-03-2012 03:25 PM
You should be able to set your memory to initialize to zero in the Memory Properties. Here is a link that should help you out:
Hope This Helps,
08-08-2012 11:44 AM
I had tried that in the past and didn't get it to work. I guess I must have forgot to press "Apply." It is now working.
Thank you so much for your help!