10-22-2015 02:50 AM - edited 10-22-2015 02:51 AM
Hi for all,
my problem look easy but its not real.
i want to introduce simple equation to my project which simply generate PWM signal with "PWM bridge pair" function. as this function need Ontime and Half_period with format (I16) and (I32) i want to introduce simple function which convert frequency 32kHz to 625 ticks = Half_period(I32) since FPGA clock its 40MHz so i tried to introduce this equation
Hal_period (PWM pair bridge Block) = (40000 / F) / 2 in order to obtain F like input in kHz and not ticks as input.
i found in forum many solutions like :
http://www.ni.com/example/29021/en/
or this one also
http://forums.ni.com/t5/LabVIEW/Dividing-in-FPGA/m-p/189324/highlight/true#M109575
i download it which in attached piece 2 but how to use it with my existing project.
i do like this my programme is attached in piece 1 with comments but not fuction :/.
thanks for all helps.
10-23-2015 06:22 AM
No answer !!!!!!!!! Please i need help .
i'am blocked at this problem 😕
10-23-2015 10:18 AM
Rayden,
Could you clarify what exactly is not working for you? You say your program does not function but it is hard to identify what your problem actually is.
I did notice that in the code you posted, you have a single cycle timed loop warpped around your entire program. The single cycle timed looped is mean to contain a small amount of simple code. In your program, you have a lot going on inside your single cycle timed loop. I would recommend using a regular while loop instead.
10-25-2015 03:30 PM
I want simply to divide 4000 by variable I32 . it means i want to convert ticks in frequency as FPGA clock is 40MHz
F (KHz) = 4000 / Variable (tikcks) thats it. the problem is dividing when i use R and Q fraction or simply bloc fraction / is not function in labview with FPGA target.
10-26-2015 09:54 AM
Comparing your code to the provided example, it seems like you are missing a shift register in your while loop. Could this be the cause of your error?
Again, I would not recommend using a single cycle timed loop with a while loop inside of it.
11-03-2015 02:47 AM
not yet. 😕
the problem is how to inject while loop and FPGA Horloge loop.
there is no other solution without looping to avoid loop problem to do dividing of 2 variables in FPGA !?
11-03-2015 04:26 PM
You cannot divide or use loops inside a single cycle timed loop.
11-04-2015 01:56 AM
Yes i confirm it. So how can i do to divide 2 variables format U16 ?!!
Please i am blocked for 3 weeks 😕
11-04-2015 02:07 PM
You should be able to divide two U16s in a normal while loop. Just make sure to remove your single single timed loop. Division takes more than one cycle of a timed loop.
11-05-2015 01:32 AM
i didn't understand can you give me some détails !
dividing in labview its different than dividing in labview FPGA 😕
please can you tell me what modification i must introduce to my program a sugestion look very usefull. thanks