Traces not synchronized when acquiring the same signal with scan engine on different targets

[CyGa]

HI,

I'm acquiring the same physical signal onto 2 distinct targets : one is a cRIO with a 9239 module in its backplane, the other on is a PXI chassis (1082 with controller 8135) connected to an EtherCAT backplane with also a 9239 module.

Signal is acquired at 1000Hz thanks to the Scan Engine custom device. Scan engine and PCL are synchronized on both targets. Signal generated is a square signal, 100Hz. So I've got 10 points per period.

Both targets are time synchronized using IEEE 1588. cRIO is the master, PXI is slave (you can see synchronized absolute time on Capture2.png)

When tracing the signal on the workspace or saving it into a TDMS file (using the Embedded Data Logger custom device) I would have expected the signals to overlap (+/- 1pt due to asynchronous start of the scan engine).

But as you can see on Architecure.png it is really not the case. The phase is confirmed in the TDMS file so I guess it is not a problem of display. Moreover the phase angle is not constant...(see other capture).

What is going on ?

[Jiri_K]

Hello, 

for the synchronization I recommend to follow http://www.ni.com/white-paper/14637/en/ 

cRIO doesn't support HW 1588. You need to share clock for FPGA through digital...

~Jiri

[CyGa]

Hi Jiri,

Thank you for the link but in my case it doesn't help.

As you said cRIO doesn't support HW 1588, but :

1. I do not have the choice of the target
2. I'm not searching at the ultimate precision nor acquiring at the exact same time on several targets (only the timestamp must be 'trustable')

We've gone through more tests and it appears that the scan engine is not causing the shift : we've isolated the scan engine device and made it generate the signal acquired on a AI onto an AO. Works fine with the expected loop shift.

The Embedded Data Logger we use has been modified to to be able to launch data saving for specific duration when a certain amount of time elapsed. Maybe it is that modification which produces the consequences exposed in my previous post. We'll try to go deeper in our investigations and see how that can be resolved...