Problem multiple models Veristand 2014

[Allende]

Hello.

I'm having a strange behaviour with my models running in Veristand. I'm a very experienced user with Labview and Veristand and this is the first time I have seen this problem.

My HW is a pXI8110 with can board configured at 1000Hz.

I have compiled serveral Labview models into Veristand (14 to simulate the ECU plant of a vehicle). There are not so complex. These models read data comming from CAN, execute the code and connect the outputs to other models or CAN. I have also a Custom device with is consuming 50% of the 4 cores.

When I start testing the system I can check that several code into some models is not being executed. I mean, I have 6 can inputs in one model and I can see that all the values concerning 5 inputs are working properly but the code corresponding to the last input is not working properly. I have checked that the mappings are right and I have also forced the last input value without any positive result.

I have also tried to change the models execution order but it still doesn't work. I have increased also the decimation of this model (instead of 10 ms to 100ms) but it doesn't work.

If I try the model in a Veristand PC project it works properly so I'm wondering if it can happens due to a cycle time leak, because the PXI is not able to execute all the model code. 

Do you have any idea about what can I check?

Thanks in advance.

Miguel.

[thumble]

Hi,

If even faulting the channel has no effect you could try a look at http://forums.ni.com/t5/NI-VeriStand/Wrong-channel-value/m-p/2951249/highlight/true#M3814

Best regards

[swbpnole]

Funny this topic is here, I was seeing a somewhat similar issue where there was a growing difference between the number of Tx'd messages and Rx'd for our CAN model. Talking with NI engineers I was advised to implement a custom device:

http://zone.ni.com/reference/en-XX/help/372846G-01/TOC46.htm

There are differences in how VeriSTAND treats models vs. custom devices. I would look into this page for possible understanding into your issue:

http://zone.ni.com/reference/en-XX/help/372846F-01/veristand/pcl_modes_models/

[Allende · Accepted solution]

Hello.

I have done multiple tests and the model is working again increasing the decimation.

In order to avoid it again I have generated a "code execution time" in each model using counters and I check if this time is greater than the actual execution time parameterized in Veristand. In that case I generate a warning. Then I manually readjust the model execution times and orders. Unexpected results can be obtained if it happens again.

BR,

Miguel.