Scan Engine & EtherCAT Custom Device Feedback

[Martin_Sveningsson]

Get an error:

[Devin_K]

The error is coming from the "Set Scan Engine Mode" at the very end of the VI.  Stephen mistakenly wired the IO Variable path to that VI instead of just the IP address.  If you wire the IP address instead, you won't get an error.

The important thing is that your screenshot shows that no masters or modules were found (the detection takes place before the error is thrown).  Try the two suggestions I posted above, and let me know what the results are.  If the first suggestion isn't working, you can also try Reverting the 9144 to scan mode from the LabVIEW project.  I don't have the exact steps for that on hand, but it should be an option when right-clicking on the 9144 in the LabVIEW project.

[StephenB]

Whoops good catch.

Team work makes the dream work

[Martin_Sveningsson]

Ok made the change in the VI and no error this time but the results are the same. No Masters or modules were found.

Regarding the other two thing to try:

1. Im not sure that I understand this point correct. I do not see a 9144 in my VeriStand system definition file. I can add one manually and try to do make a revert but get the error 132465 (Master 0 not found) which follows the same resulsts as before. Can not find the EtherCAT Chassis.

2. Did a ftp and cleared the config folder, made a restart and...YES now the Auto Detect works better. I do get up a EhterCAT Master with the Empty Slots (1-8) however what I understood this is expected?

Continued to defined my slots with the modules and tried to deploy but ran in to the next issue.

Now I get the follwoing error:

The VeriStand Gateway encountered an error while deploying the System Definition file.

Details:

Error -65587 occurred at Project Window.lvlib:Project Window.vi >> Project Window.lvlib:Command Loop.vi >> NI_VS Workspace ExecutionAPI.lvlib:NI VeriStand - Connect to System.vi

Possible reason(s):

CompactRIO:  The bitfile required by the RIO Scan Interface is either missing or corrupt. Reinstall the software on the LabVIEW Real-Time target.

I have not debugged this in detail yet, I just happy the "found" the EtherCAT chassis!

Thanks

/Martin

[Devin_K]

Hi Martin,

Glad to hear there is at least some progress here!  Now that #2 worked, I would recommend you go back and do #1 again.  Based on the error it sounds like there's a bitfile on your 9144 which is preventing the modules from being discovered.So, do teh following

1. Auto-detect.  This should add the master and the empty 9144 as you described.

2. Go to the "User Variables" section and click the "Revert Slave to Scan Mode" button.  Now that you are able to perform the auto-detection, I don't think you should get an error doing this any more.

3. Auto-detect again.  This should now discover the slave with all of the modules in it.

[Martin_Sveningsson]

Yes that worked. I'm also able to deploy and finally control my I/O signals using my workspace however I need to set the FPGA/Scan Interface mode to "FPGA Mode" to get the system definition to deploy. If I set it to Scan Mode it got the Error -65587 described above.

/Martin

[Devin_K]

Great to hear!

The FPGA / Scan mode option on the controller page is really for CompactRIO controllers to determine what mode their built-in FPGA should be in.  It's not directly application for the PXI + EtherCAT use-case.  You should be able to leave it on "Use current", although I guess setting it to "FPGA mode" seems to work as well.

[Martin_Sveningsson]

Yes you are right it works to set it to "Use current" as well.

Thank Devin and Stephen for all your help. Take care in Austin and the hot wether

Regards,

Martin

[Devin_K]

Thanks!  Sometimes a bit too hot for my tastes, but I guess I can't really complain

[cwalk]

Devin,

Software: Windows XP, VeriStand 2010 and have installed the Scan Engine & EtherCat Custom Device version 2.3

Hardware: PXI-1044 with a PXI-8231 Ethernet board connected to 4 slave NI-9144 EtherCat.

Model: Simulink pass-thru model (1khz rate)

I am using a 9425 module (sinking digital input)  in slot 3 of my first 9144 chassis (using FPGA for this chassis)

I am experiencing a glitch on physical channel 14 (all the other channels work fine)

I have tried several 9425 modules so I do not believe it is the module

I am inputing a 24V high side signal - when I graph the I/O line in Veristand it turns on & then glitches to off periodically

I have looked at my FPGA code and it is identical to all the other channels on this module.

I have no Idea what could be causing the problem - any known issues with the scan engine?

Thanks

Curt