NI FlexRIO Development Tools Discussion

[KvZ]

Hi James,

Recent FlexRIO Adaptor Module support comes with most of the basic components (with the NI-579x support). Also the VST Design libraries contain some basic elements as well.

If you prefer VIPM then the LabVIEW Tools Network repository contains a 'NI Basic Elements IP' package. This is a dependency for the LabVIEW FPGA IP distributed trough the Tools Network. (See: )

Hope this helps 😉

[James_McN]

Wow that is perfect! I had no idea it existed but will have everyone I work with download it!

[David_Staab]

Karsten van Zwol wrote:

If you prefer VIPM then the LabVIEW Tools Network repository contains a 'NI Basic Elements IP' package.

Wow, that package should be pre-installed with LVFPGA, in my opinion. However:

1. It installs its palette under "NI-579x Configuration", even though I can access it on any target. (I tested it on a cRIO-9072.)
2. Some of its functions are prefixed "ni579x" but are made available to other targets.
3. The package has a "Conversions" palette with VIs that use string functions, breaking the run arrow when they're placed on an FPGA block diagram.

It seems like the package needs a little cleanup to meet the standards of the Tools Network.

[Ryan_V[DE]]

Howdy guys,

Apart from the question of whether or not these are installed by default with LabVIEW FPGA, this is a classic exmaple of shared vs. private components. The FlexRIO and VST installers both include a privatized version of this library, to simplify their respective installers and dependency matricies, and to preserve software autonomy. There are plans to converge on a single, shared instance of these (very common) components, but since we're not there yet, we elected to create another version used in some of our higher level IP components, to remove any specific dependencies on FlexRIO or VST support, as the IP might be used in either. Instead, this dependency can be automatically resolved through the VI Package Manager.

David, are you sure you're not looking at the private FlexRIO version of these libraries?  That sounds a lot more like what you're describing, and the first two points are expected as this is a private copy of the library. As for the VIPM-installed version, that should be in the user.lib palette. I just took a look, and it appears that it has some issues as well, not installing everything I thought it should. We'll be sure to post an updated version soon...

As for the 579x conversions which make use of strings, I'm not sure about that, but I replicated the behavior you're seeing. I'll ask around and see if I can find an answer.

Regards,

Ryan

[mvzuilekom]

Hi,

I have been using a beta version of the 5772 Reference Clock Synchronization CLIP under LV 2012. The FIDL synchronization library was used to help align the 5772's.

Checking the functionality in the release version in LV 2013, I am now stopped by the fact that the synchronization library is not generated for LV 2013.

The 2012 version of the FIDL sync library was provided by dklipec, Is it possible to do this for LV 2013?

Kind Regards,

Marco.

[dklipec]

To streamline your efforts (and anyone else who is using FIDL 1.1 with LV 2013), here are the regenerated files for synchronization library.  I've also unlocked these files so that the password restriction is not present on them (so in the future, it will be possible to regenerate the TDC simulation files yourselves). 

Unzip this folder, and overwrite the "instr.lib\FlexRIO\Libraries\Synchronization\FPGA\Implementation\TDC" with the contents of this one.

Note for future users (post LV 2013 users rebuilding FIDL 1.1): If you choose to regenerate the simulation models, you will have to do this from a "subst" directory.  This is due to a Windows filesystem limitation with long path lengths.  This can be done by running at a command line:

Microsoft Windows [Version 6.1.7601]

Copyright (c) 2009 Microsoft Corporation.  All rights reserved.

C:\Users\dklipec>subst L: "C:\Program Files (x86)\National Instruments\LabVIEW 2013"

C:\Users\dklipec>L:\LabVIEW.exe

This makes LabVIEW appear in a shorter directory path, making the aforementioned long directory path short enough to fit inside of the Windows path length limitations.

[olinek22]

Hi,

Today I've got customer who wanted to communicate with this Instrument Development Library. He modified Acq Engine on Generic.lvproj to work with 7962R and 5752. After this he met two problems which I helped him to solve it.

1. There was a problem with compilation on U128 types. Finally we changed it to U64 what was resolution. Problem was connected with types and Xilinx tools, I don't know exactly how LV translates selfmade data types like U128 and how it behaves during compilation.

2. I found some inconsistency in libraries. In every example one FIFO to host is named as "To Host", but in "Config To Host FIFO - U64.vi" this FIFO is called "To Host FIFO" (Refnum is wrong). It induces problem with "Generic Host Example.vi" during initialization.

Of course I can be wrong, but check it for me and if there are some mistakes try to correct them.

Thank You!

Aleksander Głuszek

AE Eastern Europe

[dklipec]

Thank you for the feedback.

So, the naming inconsistency is intentional.  The FIFO in the acquisition engine formats the data in a particular way as it is fed into the FIFO to maximize throughput (packing 16 bit integers in such that they arrive in the right byte order on the host to be cast directly into an array of I16s with no copies).  The other cases, the actual data type used is the data type expected on the other side.  We have the intention to upgrade this library to support the multi element FIFO which would alleviate some of the need to do odd packing strategies when using PXIe devices.  So the acquisition engine supports I16 to-host data, but it does so using a FIFO that sends U64s over that have been packed in a peculiar way, and that is identified by the different FIFO name to make it intentionally incompatible with examples/VIs that use other packing strategies.  For lack of a better term, "To Host" is the name the acquisition engine uses, and "To Host FIFO" is the name used to identify the "normal" FIFOs where element "In" and element "Out" are the same.

One thing I want to warn you about with respect to the 5752.  This device produces i16 formatted data on 32 channels at 50 MHz.  That multiplies out to 512 bits of data per clock.  Formatted as such, that data will not fit in the storage bandwidth for writing to DRAM even if the arbiter is configured to not allow any reads during the acquisition.  This is the reason that this particular module has not yet been directly supported with FIDL.

That said, if the user uses block RAM instead (which is supported by changing the memory type in the "Storage" loop), you can configure it to work.  However, there is considerably less block RAM on the device.  But if block RAM is enough, you can save a lot of trouble by starting from the "Simple Acquisition Engine" example instead.

If a user really needs DRAM backed storage on the 5752 on all channels, it will be necessary to do bit-packing of the data.  The 5752 produces 12-bit samples, which could be packed into 12 x 32 = 384 bit words, which are 3 x U128.  This packing strategy creates several tricky problems, which is why we are working on adding 12-bit support to a "real soon now" release of FIDL.  That said: this specific IO module was not intended to be supported in that release, because there are other tricky problems created by having it have such a wide data path.  But I can look into it.

EDIT: Another alternative would be 7-series FlexRIO.  This doesn't solve the problem for your user since they are using a 7962, but it is worth noting.

[Dlinniy]

Hi.

Can you tell me please, is there any manual/help for the FlexRIO Development Library in which all the Vis are descripted in details? Also maybe there are any package of examples?

Thank you.

[dklipec]

Beyond the examples that are installed? You can find those examples in the Windows start menu at National Instruments->FlexRIO Instrument Development Library.  Or in LabVIEW\examples\FlexRIO\FlexRIO Building Blocks