10-08-2010 08:42 AM
I just received word from my board manufacturer that his software reports shorts when Ultiboard's connectivity and DRC checks pass. I inspect the Gerber files and the manufacturer is correct - there are shorts.
When I place a 2-layer Microvia in my design, Ultiboard correctly places a pad at the source layer and a second capture pad 2 layers below. No copper ring exists on the layer between (correctly). However, DRC has no problem with my putting a trace there. Routing a trace between these two pads will either create a short, or will prevent the laser from drilling as deep as it should, which would then also cause an open with my target capture pad.
I believe this is wrong. To reproduce, create a single layer board with 3 stackups on top. Place a microvia from Top Stack-up 3 to Top Stack-up 1. Put some surface mount pads to the left and right and create a logical connection in the netlist editor. Now create a 3rd and 4th pad that and logically connect them. Connect 1st and 2nd pads using the microvia. Connect the 3rd and 4th pads routing through the Microvia on layer Top Stack-up 2.
There will be no DRC error. However, there's no possible way to actually fabricate this.
10-08-2010 10:19 PM
Post a mock up pcb here with the conditions, I would like to see what your describing.
10-09-2010 11:38 AM
See attached.
10-09-2010 07:11 PM
Yeah I'm seeing no errors either, most likely a new bug or not properly tested added functionality block.
I wonder if it has anything to do with this:
Consequently, if you attempt to transfer from Multisim 11.0 to an Ultiboard 10 or earlier file format, and you have either top or bottom stack-ups in your design, you will be notified that only the regular copper layers will be exported
They even say this is a new piece, most likely they will download this layout file and then use it as a guideline to figure out what is really wrong and then release it 6 months from now.....(hopefully NOT).
10-13-2010 03:04 PM
Thank you for posting this problem, I will create a defect report for this issue.