Multifunction DAQ

cancel
Showing results for 
Search instead for 
Did you mean: 

Two hardware-timed self-defined analog outputs

Hi,

 

I am trying to generate two different hardware-timed votage ramps with LabVIEW 2014 14.0f1 and DAQ Card 6323. At the moment, everything seems fine if I just do single analog outputs as attached. However, it doesnt work properly if I put them together. It is said one should use only one Write function and set it as N chan N Sample. I tried to operate this way but here comes a problem. When doing seperately, signal generation rate is controlled with rate of DAQmx Timing function. As there is only one Timing funcion if doing in single task, how can I generate the singla at different rates ? 

 

I am quite new to LabVIEW and enclosed my current codes here, including two sperate ones and a single-task one (not working properly). Also, I dont know how to split signals from DAQmx Write and then give them to two Waveform Graph respectively. 

 

Any help or suggestions will be highly appreaciated.

 

Best regards

 

Liang

Download All
0 Kudos
Message 1 of 4
(3,548 Views)

Hello,

 

I am Ed from National Instruments Applications Engineering. I am happy to assist you with your query regarding DAQmx tasks, first I would like to know more regarding the application. 

 

What is it you would like to achieve with your application as a description?

 

The above question is because I am unsure as to what the desired behaviour is that you would like. You are correct in that you cannot have one singular task running at different rates with differing clocks. Similarily you cannot have analogue/digital input/outputs of the same port with differing clocks. This is due to the hardware and that the routing of clocks is achieved through "cables/lines", for which only one singular "cable" can be routed to be the internal clock for the hardware. Although looking at your VI's this should not be the issue since the differing rates are of different I/O ports.

 

However you can have an analogue output and input task running at different rates as these are seperate to one another which I believe is what you are attempting to do given the VI's you attached which can run at different rates if they use differing clocks.

 

To split a signal, depending on how it is merged, you can use "Split Signals" for which I have included the help page regarding this function node below or alternatively split these as an array:

 

http://zone.ni.com/reference/en-XX/help/371361M-01/lvhowto/splitting_signals/

 

However I believe DAQmx VI's take Waveform input in the form of an array of waveforms in this context, thus you would need to convert the signals to a single waveform and then build this into an arry before writing to the Write VI. Similarly you can then use Index Array to split up multiple channels from the Read VI, as illustrated in the VI attached.

 

I hope that this is helpful and you are successful in your application.

 

Best regards,

 

Ed

0 Kudos
Message 2 of 4
(3,484 Views)

Hello edjones,

 

Thanks a lot for your reply. I had a go with your modified codes but I cannot see any signals. What I would like to generate are two signals to control corresponding mirror rotation angle. Signal X is a voltage ramp from -10V to 10V and each voltage step lasts 1ms. In contrast, signal Y is also a voltage ramp from -10V to 10V but each voltage duration is 100ms. For both signals, we would like to scan lets say 100 voltages. So voltage increases 0.2V per step.

 

Signal X: -10, -9.8, -9.6, .....9.6, 9.8, 10 (each lasts 1ms)

Signal Y: -10, -9.8, -9.6, .....9.6, 9.8, 10 (each lasts 100ms)

 

I hope I made myself clear enough. Would you mind looking into this further ?

 

Many thanks

 

Liang

 

0 Kudos
Message 3 of 4
(3,475 Views)

Hello,

 

To perform such an action I would recommend to use a cDAQ with at least two analog IO modules so that you can perform at different rates. This is because one single task cannot process at different rates and similarly the analog input and output of your device can only process at one rate due to the hardware restrictions and that there is only one sample clock for analog input and one sample clock for analog output.

 

That being said, you could achieve your requirements by programmatically handling the "stepping" of voltage. You could "concatenate" these signals since their required rates are divisible by one another. I have created a VI and attached this which illustrates how to generate two arrays which will be the signals to write, if you run this at your fastest rate, 1ms, this will output data as you have specified using boolean logic to generate the arrays with steps in Signal Y every 100 elements (thus 100ms) and steps in Signal X every element (1ms).

 

Please could you verify whether this would be an acceptable solution to your application.

 

I hope that this is helpful and you are successful in your appication.

 

Best regards,

 

Ed

0 Kudos
Message 4 of 4
(3,446 Views)