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Specified route cannot be satisfied for edge counter on Dev1/ai/SampleClockTimebase

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Accepted by topic author patrick984

The 9236 has its own 12.8 MHz timebase, it doesn't use the chassis timebase like some other modules do.  So your original inclination to use /cDAQ9188XTMod1/ai/SampleClockTimebase was correct.

 

When you have multiple 9236s in a single task, the driver configures the chassis to route the timebase from the first module to the others for synchronization.  For reasons unfamiliar to me, it seems that doing this makes the timebase unavailable to route to the counters...

 

 

To NI:

 

1.  Is this behavior a bug that could / should be fixed?

 

2.  If not, is the behavior documented anywhere?

 

 

To Pat:

 

You can try either of these options as workarounds, but I don't have the hardware to test them myself so no guarantees:

 

Possible workaround 1:  Generate a new timebase from one of the spare internal counters on this chassis.  The internal output of the counter should be routable to the module timebases as well as to the source of another counter.  You won't have the same 12.8 MHz since the counter's timebase is 80 MHz, but instead could have 80/7 MHz (80/6 MHz is too high for the 9236, 80/8 MHz would give you a nice even 10 MHz though if you'd rather use that)--be sure to specify the new timebase rate when you configure your AI task to match the frequency generated by the counter.

 

Possible workaround 2:  You could try DAQmx Connect Terminals to connect the module's sample clock timebase to the counter source.  You might try doing this before or after the ai task is reserved.  Connect terminals isn't usually recommended since it bypasses checking for route reservation and the lifetime of the route is not tied to any task (use disconnect terminals or reset the device when you are done to undo the route).  I can't say if this will work or not though since I'm unclear on why the route you tried in the first place isn't working.

 

 

 

Best Regards,

John Passiak
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Message 11 of 17
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Hi John,

 

I tried workaround 2 and I get the same route cannot be satisfied error if I try to use DAQmx Connect Terminals before or after the AI task creation, so no luck there.

 

As for workaround 1, I have tried to create a Counter Output -> Pulse Generation -> Ticks using the 80 MHz timebase (4 ticks low, 4 ticks high) but I am having trouble finding documentation on the correct way configure the modules to use an external timebase. 

 

Regards,

Pat.

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Message 12 of 17
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Something like this is what I had in mind:

 

SetSampleClockTimebase.png

 

 

Best Regards,

John Passiak
Message 13 of 17
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Hi John,

 

Thanks for that suggestion, it looks like it might be working however I am getting odd sample rates as a result.

 

For example:

 if i set my desired sample rate to 2000 kHz, the actual sample rate is 2055.92 kHz and the SampClk.TimebaseDiv is 4864

 if i set my desired sample rate to 1000 kHz, the actual sample rate is 1001.60 kHz and the SampClk.TimebaseDiv is 9984

 

Those divisors seem rather odd, shouldn't DAQmx be able to set the timebase divisor to 5000 or 10000 to achieve the sample rates I specify?

 

Cheers,

Pat.

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Message 14 of 17
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Check the 9236 specifications page 18 (pdf link).

 

Valid divisors are multiples of 256.  With the built-in 12.8 MHz timebase this actually allows you to generate the exact 1 kHz or 2 kHz sample rate, but using the counter's 80 MHz timebase is going to result in some odd frequencies...

 

It might be worth noting that DAQmx will always coerce up for analog input tasks if you specify a frequency that is not achievable given the timebase being used.

 

 

 

Best Regards,

John Passiak
Message 15 of 17
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Thanks John, I had forgotten about the 256 factor. That all makes sense now.

 

 

Still, if anyone from NI is reading this, it would be nice to know why (hardware/software limitation?) it is not possible to export the 12.8 MHz timebase when it is being shared by multiple 9236 modules.

 

Cheers,

Pat.

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Message 16 of 17
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Hi.

I have run into the same problem this morning, and could get around by using the "/AI_0/ai/SampleClockTimeBase" signal, where AI_0 is the name of a 9234 module in my 9188XT.

Along the same line, I have been able to find the Sync Pulse that is used to synchronize the different Sigma-Delta modules as "/9188XT/SyncPulse0", where 9188XT is the name of my 9288XT. It is a short positive pulse.

One question I still have, though, is precisely what happens when the Sigma-Delta module receives a start trigger:

Is the ADC completely reset, ie a sync pulse is sent and the digital filter pipeline is cleared, or does it only mean the next time a complete sample is available it will be output?

In this case the jitter is fairly large, and can be as high as one complete sample period....

Cheers everyone,

Louis

 

 

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