Hello all,
I'm reading an analogue input voltage in a while loop. I configured a sample clock (source = RTSI0 / mode = continuous samples) and a start trigger (digital edge). I have a problem When the sample rate on RTSI0 is very low and measure less than 2 samples each iteration. I can only read the buffer if it contains 2 samples! I'm missing the last sample when I generate an uneven number of samples (excluding the first trigger to start the task). How can I make sure I read all samples?
Thanks,
Jos
LabView 7.1
PCI-6220 card