timestamp using fpga module on pxi-7831R

[graduate student 44]

i'm having a pxi-7831r listening to a digital signal initiated by the master card on the same chasis. each time it is triggered, it takes a timestamp relative to a 64bit clock counter (i used two U32 for the 64bit counter). the triggering frequency from master card is on the order of 50khz and i'll need to store all timestamps on the host computer eventually.

i'm new to fpga programming. what will be a good strategy for this problem? i'm thinking of making the fpga vi output the current timestamp to the host computer each time it is triggered, but that means it has to output two U32 integers 50000 times/s to the host vi. or should i build an array and store chunks of timestamps on the pxi and let the host vi read them once
a while? or anything else?

[Kristi_P]

The following KnowledgeBase 2XF9PGN6 provides benchmarks for this kind of operation. Based on these benchmarks, you can decide what would be a reasonable solution. An alternative would be to provide only the intial timestamp and the sampling rate. That should result in smaller data transfers.

Regards,

Kristi H
National Instruments

[graduate student 44]

thanks Kristi. I managed to route my "AI Convert" signal to an RTSI bus and things seem to work fine now. i got one more question though. do you have any idea? Thanks!

[Christian_L]

You should probably setup some form of buffering in your FPGA VI. Everytime you want to sample a data point or record a time stamp, you should write it into the buffer. In a separate loop in your VI the VI should communicate with the host application to send data from the buffer to the host. Here is an example of such a buffering application. This example was written in LV FPGA 7.0.

In LV FPGA 7.1 there is a new FIFO component that you can use to implement the buffer much more easily.

Christian L