sampling frequency of an FPGA

[CrisSTine01]

Hello,
My FPGA operates at a 40MHz clock, I wish to acquire an analog sensor, I want to know if I do not use timing to set the sampling frequency just a while loop in which I connect the tail module NI concerned to a digital indicator, would I have 40MHz as sampling rate ?? if not how could I know  the default sampling rate of the FPGA ??
thank you in advance
cordially

[Jacobson-ni]

The rate at which you read analog input data is going to be dependent on the device that you are using.  Most analog input devices will spec the maximum sampling rate so if you can tell us what hardware you are using we can tell you how fast you would be able to sample.

The reason you are likely not giong to be able to sample at 40MHz is that the acquisition speed is limited by the analog to digital conversion.

[natasftw]

"analog sensor" tells us pretty much nothing.  Do you have a very expensive analog sensor?  If not, odds are it can't keep up with 40 MHz.  If not, why are you worried about the maximum sampling rate of the FPGA?

If you want to know how long your code is taking to run, take a look at using ticks counts before and after your code to see how many ticks are being used to run your code.  That will tell you how long your code is taking to run.  That will help you figure out the rate you're sampling. 

Worrying about "default" sampling rate is relatively meaningless.  It's not what you're working with.  Odds are, it's faster than you can keep up with for an analog task.  It's similar to worrying about whether or not it's raining in Antarctica while you're coding.  But, the default sample rate is 40 MHz.