07-31-2015 04:49 PM - edited 07-31-2015 04:51 PM
After removing the clock from project exploer, should we reinstall it again? I guess the porject needs a leat one colock.
08-03-2015 12:07 PM
Hello Pidename,
I would recommend adding at least one clock to your FPGA target. You can do so by right clicking on your FPGA target and navigating to New=>Base FPGA Clock.
Regards,
j_bou
08-07-2015 08:22 PM
Thanks J_bou, you are right because it cannot work without at least one clock. The problem here is that my FPGA is set to run at 40 Mhz but for me to meet time requirement a need 15 Mhz. I can compile with 15 Mhz but when running it crashes without any output.
08-10-2015 09:06 AM
Hey Pidename,
Can you give me a little more infromation on the crash? Does it give you an error at all? It may be helpful if you can attach a screenshot of your code.
08-07-2018 02:23 AM
Hello guys,
I'm getting the same error here. Some info:
LabVIEW 2012
Target: FPGA Target (RIO0, cRIO-9082)
Compilation Tool: Xilinx 13.4
I have tried both with the local compiler and the Cloud compiler service. It's odd that sometime I am able to compile (although it was taking much longer than normal (~2h), but now it goes on to ~1h30 a gives the said error: "The compilation failed due to timing violations, but there is no path information because the timing violations are not of type PERIOD."
Is there any info from Xilinx log that you would like to see, so that it would help?
Thank you in advance,
08-08-2018 08:14 AM
Hello,
People on this forum post seem to have a similar issue and provided a few solutions.
08-08-2018 09:13 AM
Thank you Brian.
I assumed it was implicit, I had already tried those. None worked, unfortunately.
BR,