hey, sorry for this question i think that the answer ei very simple.
I generate a squared signal with labview Vi in a fpga and with a Compact RIO module.
I have two signal with the same frequency and with the same duty cycle time.
I want to create a late between my two signal.
I will have 120° between my signals.
If you have idea for me....( the code can be implement in fpga)
Best Regards
François