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how to store data from Host.vi in cRIO-9074

TejasKumar Patel

I implemented a advance Measurement and Control system using cRIO-9074
with c-Series I/O cards( NI 9217, 9411, 9264)
I have some questions about it,

(1)- Data rate from FPGA targate to host vi is too low. how can I increase
it, when I run my host VI,  sometimes all temperature sensor update at
same time and sometimes one by one, can you please give me some hint, how
can I correct it, I used two FIFOs for NI-9411 digital pulses, I put all
Digital input  and all analog output and input in a seperate while loop in
FPGA targate VI.

(2)- I have to write that data to analyse for further result. I tried all
possible way to write data including wite to spreadsheet.vi, write to
text.vi, Data storage.vi, Write to measurement.vi. All this VI work
efficientlywhen it run individualy, But when I connect this VI to
writedata from FPGA host VI. than it always give empty file.
 I saw your post in NI discussion forum about how to write data from
Host.vi, But still I am confuse that how can I creat a protocol between
host VI and Fpga target vi. to write the data in a file. I have nearabout
38 channel to write data.

(3)- I have to measure time difference between two digital pulses, to find
a flow rate. I am using counter for it with risisng edge shot.vi, but when
i get a timestemp when there is risisng edge for the second rising edge
how can I get timestemp. Its like i have to measure time between two
pulses, I triend waveform measurement.vi to find cycle period. but it not
worked. any other was to measure it.

I am stuck in this question since from last one month. I already followed
NI-discussion forum solution but it doesnt work. I think the way I applied
is may be wrong. 

Looking forward to hear from you soon.

Plese send an additional email copy to tpatel1313@gmail.com

Thank you and Best Regards, 
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Message 1 of 7
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Hi Patel,

 

I'll need more information to help you here. Let me summarize what I understand:

 

1. Data is acquired from 9217, 9411 on the FPGA target and sent to the RT Host VI through 2 DMA FIFO channels. (38 channels total)

2. Digital and analog acquisition and transferring via FIFO is done separately.

3. The RT host VI must log all data to a file, but the file is always empty.

4. You need to measure time between pulses.

 

Please check whether I understood this correctly.

 

Here are a few questions still:

a. How many analog channels? How many are digital?

b. can you display data on the host VI (in graph for example)? Does it work correctly?

c. How do you transfer all the channels to the host VI?

d. Where do you try to measure the time between pulses? FPGA or host?

 

Thanks.

Regards,

Joseph Tagg

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Hi Patel,

 

1. it would be much easier and more practical to simply count the ticks of the FPGA clock between rising edges on the FPGA target. You can then send that value to the host.vi to convert to a more practical unit and use as period. Use the host in this case only for the display and the conversion to more comfortable units for logging.

 

2. I would suggest on the RT target to use low-level file IO VIs such as write to text file, where you explicitly open and close the file before and after the main loop.

 

3. Are you sure you need timestamps here? If you're only calculating differences, then simple numeric times should be enough.

 

Regards,

Joseph Tagg

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Thanks Joseph for your support,

 

1-      If I count the ticks between the pulses it always seems different ….because this method I already tried, but it does not work,  like some times it shows 9099 tick and at the second pulse it shows like some more or less ticks not the same ticks every time. To complete my project, the biggest problem is the data storage.

 

2-      As you gives the solution in NI forum, “low level file I/O Vis such as Write to text file” FPGA target not support this VI. And mainly I want to write data from HOST.vi, because I am process those data …and I need to store it. For to figure out my result.

 

3-      If I use “Write to text file. VI (Sub-VI ) to FPGA.vi, it not support because it support string data and I have FIXpoint data. And can you explain me what is low level file IO, and how can I use in fpga.vi??

 

4-      Yes, for my project time stamp it really necessary, for data analysis.

 

5-      I need the time stamp to find out what was the system response at the time.  As our project based on weather temperature, I need time stamp.

 

Waiting for your reply,

 

Thanks and Regards,

Patel

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Hello Joseph 

 

Here I attach a screen shot of the error, which I got when I use sub VI for data storage in FPGA targate.

 

Regards,

Patel

 

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Message 5 of 7
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Dear Joseph Tagg.

 

So...Finally I got a New easiest way to Store data ..from "Host,vi"

 

Thanks for you Support.

 

Best Regards,

TejasKumar Patel.Smiley Happy

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Message 6 of 7
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Hi all,

 

I am working on a Temperature sensor(PT100) that uses CRIO-9074 and i/o module 9381.In my project i am aquiring the voltage value across the sensor using CRIO-9074 and convert that voltage to temperature using the RTD function and store the value in array.I wanted to know how we can store the voltage data that we get from CRIO-9074 in a text file.

Any one can you please help me out.

 

Thanks & regards

Nitin

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