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fpga

Hi.

I am using cRIO 9012 and cRIO 9114 for chassis with LabVIEW 2013.

I got this error while a new FPGA project.

Can anybody tell me what should I do?

failed create module.PNG

 

Thank You.

0 Kudos
Message 1 of 9
(3,420 Views)

Have you given static IP? Give static IP and check. l

i.e cRIO 192.168.0.2 and computer 192.168.0.1.

PBP
Labview 6.1 - 2019
Message 2 of 9
(3,397 Views)

@PBP wrote:

Have you given static IP? Give static IP and check. l

i.e cRIO 192.168.0.2 and computer 192.168.0.1.


Hi PBP..

@I've tried both..give static IP @ DHCP..

i.e: cRIO 169.254.4.42 and computer 169.254.4.26..

but, still it shows this error.

I've checked in NI max, the connection is all right (connected-running)..

NImax.PNG

 

fyi, i've build a fpga project before and there's no problem at all..

but,when i'm trying to build a new fpga project,the error is pop up..

besides that, i can't run my previous fpga project anymore since it shows error-63043.

error-63043.png

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Message 3 of 9
(3,359 Views)

Can you please attach screen shot of FPGA VI block diagram?

Have recompiled your FPGA VI?

 

PBP
Labview 6.1 - 2019
Message 4 of 9
(3,343 Views)

 

@PBP wrote:

Can you please attach screen shot of FPGA VI block diagram?

Have recompiled your FPGA VI?

 


Here are the attachements of the screen shot of my FPGA block diagram..

Yes, I've tried to recompile but then it shows error-63043..

Download All
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Message 5 of 9
(3,331 Views)

Can you put some delays in every loop? How much is your sample rate?

You have not connected delay teminal to wait until... function.

You can also combine voltage and current loop if all have same sampling rate.

 

 

PBP
Labview 6.1 - 2019
Message 6 of 9
(3,319 Views)

Hi PBP..

 

Good news! I've succesfully deployed the VI to the real time target and can build the new fpga project without an error.

I believed it caused by the processor overuse .

error-63043.png

 

so, i decided to uninstall some of the unused software to the controller.

Btw, I thank you very much for your help. Really appreciate that..Smiley Very Happy

 

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Message 7 of 9
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Great.

Thanks for kudos....

If you put some delays in loop this will allow processor to do other task. 🙂

PBP
Labview 6.1 - 2019
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Message 8 of 9
(3,292 Views)
  • Have a useful title.  The title of your question should never be "labview" for "fpga".  Your title should also not be a paragraph.  It should be a quick summary of the topics your post is going to discuss.

Source

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Message 9 of 9
(3,277 Views)