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fpga: vi define memory

I just noticed that you can definie a register, FIFO, and memory inside the FPGA VI.  I have a few questions.

 

1. When is a good time to define and use a register?  I only know about the FIFO and memory.

2. What are the trade-offs between declaring one memory, putting everything in it, and clearing multiple memory, grouing different contents in different memory.  

3. The same question but for register and FIFO.

 

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Hi jyang, 

 

A register can be useful if it is only a single block of data and a register gets implemented as a Flip Flop on the FPGA. This is slightly faster than writing and reading memory and is good for passing data quickly between different portions of code. The FIFO is deterministic data communication between multiple FPGA VI scopes as well as communicating with the Real Time host VI. FIFO could mitigate race conditions that may occur in memory. Memory race conditions could occur when a block of memory is read before it is written which would result in bad data. Memory is also useful when storing a lot of data. I dont think there is much difference between declaring one large memory or multiple small memories unless there is a lot of dynamic data creation and you are concerned about running out of memory. Finally, it is important to realize that the FIFO is going to be generated in memory anyway so there will be no time savings there.

Patrick H | National Instruments | Software Engineer
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