fpga for image processing

[prashiit]

Hello everyone

           I am working on image processing. I want to know how image processing techniques can be implemented in fpga. I knw FPGA does not support IMAQ modules. It only needs stream of image data. To what format. I should change the image.. and .. how can I send this data to FPGA.  

formatting of image to suitable format can be done in host VI. But, how can we send this data to FPGA VI. there are two methods for communication between host vi and FPGA vi -> front panel communication and DMA FIFO. Which is best suitable for image processing. 

Can any body tell the step by step procedure to do image processing on FPGA.   It is better, if u send any example..

Thanks

Prashanth

[Hardik.Asawa]

Image processing typically requires huge amount of data. Also as you said it doesnot support IMAQ modules you will not be able to directly implement image processing algorithms. So what i suggest you to do is do image processing in host itself.

If you want to do data transfer from Host to FPGA or visa versa in this particular case DMA is better because for bursty data transfer DMA should be preferred.

Regards,

Hardik

[prashiit]

Thanks Hardik,

      If I do image processing in host itself, how can I use fpga for implementation.  

Can u please send a simple image processing on fpga example. 

Thanks

Prashanth 

[Hardik.Asawa]

Hello Prashiit,

What is your application.Which part of application are you trying to implement on fpga.

You can design a code such that it will transfer a part of array using dma data transfer and then perform the required operations on fpga.

Can you tell me which hardware are you using because the size of fpga will matter a lot here as you need a fpga with large number of gates.

I was trying to search for some code in which we can do some image processing on fpga but was not able to find it.

Regards,

Hardik

[JK1]

When large amount of data need to be transferred to FPGA then DMA is preferred.  Front panel transfer is preferred only when very few data is to be transferred with minimum synchronization between RT and FPGA. 

Image processing is a wide topic.  What type of manipulation you want in FPGA.

Explain in brief the application you are trying to build.

Post back the  queries.

[prashiit]

Thanks for ur reply.

    i am working for a project "Virtual lab for digital image processing".  Till now, our team implemented so many image processing algorithms in labview. We need to implement them in FPGA also. We are using Xilinx Spartan3e and cRIO -9o74.  

Here, I am not understaning DMA data transfer. First input image is converted to array in host VI. Next it should be given to FPGA VI. After processing, again fpga output should come to host VI. 

how many dma fifos should I use in host and FPGA VIs. 

Should I use one DMA write and one DMA Read for FPGA write and read resplectively.   

Can I use one DMA fifo in both FPGA VI and host VI...

there is no example for image processing on FPGA. 

Can u send example for DMA FIFO where that example should give array of data to FPGA from host VI and reads the array of data from FPGA and sends it to host VI again.

I am bothering about interface between FPGA VI and host VI... Please help me

Thanks

Prashhhh 

[prashiit]

Hello JK1

       Thanks for ur reply. I am working for a project "Virtual lab developement for digital image processing".  Till now I have implemented so many basic image processing algorithms in labview.

These will consists of basic image enhancement and segmentation techniques.

I know FPGA does not support IMAQ modules.  I need convert the image into arrays then give to FPGA.

I can convert the image into desired format (arrays, parts of array, anything).. But, i am not getting how to transfer data from host VI to FPGA VI and from FPGA VI to host VI.

Is there any example for simple image processing technique or DMA FIFO. This example should send the array of data from host VI to FPGA vi. AFter processing in FPGA VI, the resultant array should be sent to host VI. I tried a lot.  But I could not do it.

I am using Xilinx spartan3e fpga and cRIO-9074 labview FPGA.  Do these support DMA FIFOs. What is the lenght of the FIFO in these fpga s

Please reply ASAP. 

Thanks

Prashanth

[Hardik.Asawa]

You can find an example related to transfer of array using DMA FIFO on the given link

http://decibel.ni.com/content/docs/DOC-6303

I will suggest you to go to www.ni.com/examples and search for dma data transfer. You will find many code related to the same.

You can also get vis for DMA data transfer in NI example finder

Harware Input And Output>CompactRIO>FPGA fundamentals>DMA

Regards,

Hardik

[prashiit]

Hello hardikasawa

              I have seen the example inthat link.  But that is only FPGA VI to host VI data transfer.  I need an example which has both host to fpga and fpga to host VI data transfer.

Please send if u have any

 I tried to create one simple VI. I created to FIFOs. one is target to host Vi and another is host to target.   I dragged host to target FIFO in host (fifo write).

I dragged the same FIFO into FPGA VI(this is FIFO read). next I dragged target to host FIFO into FPGA VI (It is FIFO 2 write). But, when I dragged FIFO 2

into host VI, it should be FIFO 2 Read, but it is becoming FIFO 2 write.

I have given the array of data to FIFO write in host VI. I read these data from FIFO read in FPGA VI. I have added the array with 5 and given resultant array to FIFO 2 write (FPGA VI). how can read these resultant data in host VI. 

Please clarify..

Thanks

Prashanth

[Shreyas]

Hey ,

        Have a look at Ni example finder>> Hardware Input and output>>Compact Rio>>FPGA Fundamentals>>DMA

That should clear all your doubts.