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fpga delay problem can figure it out

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hello i have labview pci virtex 2 board in the pc and trying to implement DMA from host to fpga (i am using a clock of 200 mhz which is the initial 40MHZ with pll multiplier)

but each time i compile a delay error not meeting the requirements occurs i cant figure out how to fix it

i have tried to changed tick parameters and insert loop delay but didnt not change the error

i attached the timming error results

can i get some help on hw to solve it ?

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It's quite possible you cannot execute your code with a 200Mhz clock. Have you tried using a slower clock? Can you share your code? Inserting a delay won't help; in fact, in the screenshot you show, it looks like the loop timer function itself won't compile at your clock speed.

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ok hereare the project files i changed the fpga vi a bit and attached a print screen of the new error occuring i just want to transfer simple data and recieve them to my shift register

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shouldnt a fast clock be better then a slower one ?

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Solution
Accepted by topic author ghattas.akkad

@ghattas.akkad wrote:

shouldnt a fast clock be better then a slower one ?


What do you mean by "better"? The faster the clock, the less you can do in one clock cycle. Your code uses a single-cycle timed loop, meaning that everything inside the loop must execute within a single clock cycle, and there's too much logic in it to execute at 200Mhz. A fast clock isn't better than a slower one if it isn't possible for the code to execute at that faster clock speed. Why did you pick 200Mhz?

 

There's also no need for the sequence structure, although it isn't hurting anything.

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i picked the 200mhz maybe it could give faster data transfer from the fifo to my shifter i am building a sequential sorter in which the data input is the problem i have to make it as fast as possible

i will try to go to a lower clock and compile again to see if it will work

 

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ok i lowered the clock to 120MHZ but i got this new error i didnt understand

i did not change anything in the design

 

An internal software error has occurred. Please contact National Instruments technical support at ni.com/support with the following information:

       <APPEND>
No connection for instantiated signal

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ok it compiled successfully thank you ^.^

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