fpga asynchronous logic, Is it possible?

[viScience]

I would like to use the FPGA on my 7811R to route a digital input directly to the PXI_Star line without any clocking.  The signal I would like to route

is 25Mhz so would not be able to resample with conventional LV FPGA code.  Is this possible?  I was wondering if the IF-RIO async nodes would work

for this application.

[srm@viewpointusa.com]

simple answer, no you can not route directly.

you can try to use a derived clock to go faster, but this will still have some latency

[igagne]

Is there a technical reason why this isn't possible? It seems like you could probably lower energy consumption and minimize latency with asynchrous logic.

[crossrulz]

---

@igagne wrote:

Is there a technical reason why this isn't possible? It seems like you could probably lower energy consumption and minimize latency with asynchrous logic.

---

The IO is hardwired to the FPGA.  So the FPGA would have to read it and then pass on the signal to the PXI STAR.