fpga Time violation

[AFLAMENT]

Hello,
I try to write and read 2 module 9403 who are plugging on the same CRIO.
I have configure Inputs and Outputs as i wish but i have a "time violation" at the compilation.
Did my VI have any mistake?

BR

[MrHappyAsthma]

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@AFLAMENT wrote:

Hello,
I try to write and read 2 module 9403 who are plugging on the same CRIO.
I have configure Inputs and Outputs as i wish but i have a "time violation" at the compilation.
Did my VI have any mistake?

BR

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Are you able to upload the code or provide any more info other than the fact that you used "inputs" and "outputs" on your cRIO?

[AFLAMENT]

Hi,

I change the code and now it's work.. tomorow i ll post it.

Thanks