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fpga - Send arbitrary waveform and display response signal

Hi,

 

I'm looking for help in programming my cRIO-9068 using Labview FPGA for a relatively simple task. I am looking to send out an arbitrary waveform (I have data points for) through analog out which will go through an audio amplifier circuit. I would like to capture the response signal also using an analog input. I am able to do the two tasks separately, from means of following some examples posted, but I am having trouble combining the two tasks. I've tried doing this through memory and through FIFO on the cRIO, but I keep getting caught up on how to actuall send the signal and then read in the response and graph it.

 

The signal I am sending first needs to be loaded from an excel file that I have created. Please repsond with how I can go about combining the two methods using cRIO FPGA programming so that I can read the response.

 

I plan to change the gain and frequency of the outputted signal real time, but I can incorporate that after I understand the combination of the two methods.

 

Thank you.

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What code do you have so far?

 

Are you trying to do all of this on the FPGA or are you splitting this between the FPGA, RT, and a Host PC?

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I'm trying to send the data from the computer host to the cRIO and then read in the response from an AI on the cRIO to the host computer. I have the data in a txt file and I send the 2001 samples I have to a FIFO and a memory spot (because I tried it two different ways) on the cRIO. When I'm reading in to AI channel, I get nothing, leading me to believe I'm either not sending the data correctly, not reading it correctly , or both.

 

I've attached screenshots as well as my VI's for everything I've tried so far.

The FIFO_Host is the computer host vi i use to access the cRIO through FIFO method and it's counter part is the FIFO_Send_Recieve, which is what resides on the cRIO. For this method, I believe I'm reading the AI correctly, but I don't think I'm sending anything.

 

 

The Aribitrary_Signal_output.vi is the Host Computer VI that I use to access the cRIO memory address. It goes along with the remaining VI's as sub CIs and it has the Memory_Read_Write VI as its cRIO counterpart VI. For this method, i believe I am not reading the memory address correctly and am getting errors as outputs.

 

I'm up to using either of these methods, but I just need a way to send my 2001 samples through AO and then read the response signals from an amplifier circuit. Normally, this should be an easy task, but I'm having trouble doing so with the methods of the cRIO.

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@Ghaf wrote:

I'm trying to send the data from the computer host to the cRIO and then read in the response from an AI on the cRIO to the host computer. I have the data in a txt file and I send the 2001 samples I have to a FIFO and a memory spot (because I tried it two different ways) on the cRIO. When I'm reading in to AI channel, I get nothing, leading me to believe I'm either not sending the data correctly, not reading it correctly , or both.

 

I've attached screenshots as well as my VI's for everything I've tried so far.

The FIFO_Host is the computer host vi i use to access the cRIO through FIFO method and it's counter part is the FIFO_Send_Recieve, which is what resides on the cRIO. For this method, I believe I'm reading the AI correctly, but I don't think I'm sending anything.

 

 

The Aribitrary_Signal_output.vi is the Host Computer VI that I use to access the cRIO memory address. It goes along with the remaining VI's as sub CIs and it has the Memory_Read_Write VI as its cRIO counterpart VI. For this method, i believe I am not reading the memory address correctly and am getting errors as outputs.

 

I'm up to using either of these methods, but I just need a way to send my 2001 samples through AO and then read the response signals from an amplifier circuit. Normally, this should be an easy task, but I'm having trouble doing so with the methods of the cRIO.


 

 

Looking at your "FIFO Host VI.png", I believe you're doing read & write simultaneously (sort of unknown which will happen first) which might be one of your issues. You might want to first do the write to cRIO (bottom portion) and then some wait (if needed, or base it on a flag) and then read from cRIO (top portion).  You can easily convert your loop into a state-machine holding all three of these states and I'm sure that would work better (and also help you debug).

 

In any case, ensure that you're actually writing to cRIO first AND THEN reading from it with enough delay in-between.

 

-BTC

(Assumption is that each piece of your code work fine, but if above doesn't work then you'd have to go through checking each section of your code separately to single out the problem area)

 

 

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Right after I posted, I realized that you are continuously running that while loop... perhaps you're overwriting read data... I can't tell what you're doing when you read signal file in every loop and sending the data - if you need it done repeatedly then you can read the file outside of loop and wire the array to inside (wire will retain the value through each loop).

 

-BTC

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