cRIO FPGA control system simulation

[Jahy]

We want to use cRIO-9104, and cRIO-9004, to build a control system simulation platform.

We built a helicopter nonlinear model. The helicopter nonlinear model is running in cRIO-9004, while the controller is designed in FPGA part of cRIO-9104. All the system is built with LabVIEW.

I finished each part of the system, but it can't work properly. Two parts of the system communicate through "Read/Write Control". I tested the two parts in one vi file on my PC, it works perfectly. Can any one give me some advices?

Attachments are my programs, 1-st is controller part, realized on FPGA of 9104; 2-nd is nonlinear model, running on 9004.

[Dave_Brandt]

Have you properly deployed you FPGA Bin files and your host VI file? Can you run your FPGA code in the development environment? What error are you getting for opening your fpga vi target? 

[Jahy]

I build the controller part and the nonlinear model part on my PC, and run them together as one vi file. I worked perfectly.

When I build the controller part in FPGA, I replace all the calculation with 'High Throughput Math', other wise, the time related building error would occur. But when I run the FPGA code on my PC, it can't produce correct results. (The same code, only replaced with 'High Throughput Math').

I didn't get any error when I open FPGA vi. It only give extremely big or small system outputs. Attachments are my codes, can you give me any advices? First two are nonlinear model and fpga codes. The third one can be running on PC.

[natasftw]

If you're going to post FPGA code, you should really post a zipped up version of the project.  Code meant to run on a cRIO really doesn't work as well outside of the project.  It becomes harder to help.

It sounds like you're taking a bit more of a leap that it makes sense to do.  You're jumping from simulating two devices on a PC to trying to implement the entire system after changing the code.  Instead of doing that, you should work with one of the two cRIOs.  Move your code from simulation to cRIO.  Ensure the code is performing as expected.  Once you have each working individually, then it'll make more sense to try to integrate them into a system.  As it is now, you've got a mess to debug.  Is it the change to your code?  Is it the fact that simulation and actual hardware can perform differently?  Is it the merging of the two components of the system?  Who knows?  Don't make things harder on yourself.

[Jahy]

natasftw, thank you for your advice. The two parts of the system, i.e. controller and the control object model, They worked perfectly together. The 3rd attachment on my last post, named Heli_NonlinearModel.vi. But they didn't work when I seperated them into two parts: controller in FPGA part of cRIO-9104, while control object part in cRIO-9004. 

Here I want to explain that cRIO-9004 is a Real-Time Controller equipment, cRIO-9104 is Reconfigurable Embedded Chassis. They are connected together. Here I want that the control object model running on 9004, the controller running on the FPGA part of 9104. The two parts of my project is Real-Time Main.vi and helli-controller-FPGA.vi on my last post. 

I think if some of you guys have the similar equips as cRIO 9004 and 9104, you can only added the two files to your project. Thank you again natasftw.

[Jahy]

Attatchments are my labview files. the first one is the zipped project, the second one is the controller and the nonlinear modle that run together. They work pervfectly when together, but when I seperate them, i.e. controller in FPGA of cRIO9014, while modle in cRIO 9004. They don't work.

[a_clucker]

Hi Jahy,

If I understand it correctly, you're not receiving any explicit errors? If it's not producing the correct mathematical result, is it possible that you accidentally wired something incorrectly when splitting the VI into a host and target VI?

If everything is correctly wired, it could be a data type issue. I noticed a couple of coercion dots in the pictures attached to your original post. The FGPA math VIs have some restrictions when it comes to data types - please see the inidividual functions' help files. Here is some general information about the high throughput math functions. More specific math functions are also linked from the page.

Hope this helps,

Andrew

[Jahy]

Thank you a_clucker.

I set the all the high throughput functions data type to 'Signed 32bits word length and 16bits integer word length'. It the actual system output can approach the desired value, but constant displacement still appears. Especially, the displacement is larger when the desired value is bigger. Do you think, if it is because of the FPGA math VIs' restriction? or something else?

BTW, can you help me check the attachments on my last post? They are the zipped the project files and the VI where I put the controller and nonlinear model together. Best wishes.