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Unsolve the sub vi

Hello everyone,

 

I made a complicated circuit in a vi file, to ease my work, I grouped several items into several sub vi files it works normally, I tried to implement this vi file and its subs to a project to simulate the FPGA, but it gives me many errors although I put the vi file and is subs under the cRIO FPGA chosen by me.

 

How can I fix that?

 

Should unsolve the sub vi files first and upload the main file into new vi file created by the project itself and recreate the sub vi files while the project run? If yes, how can I unsolve the sub vi ?

 

 

 
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Hi ysma,

 


it gives me many errors … How can I fix that?


 

I would start by reading the error description in the error list window. That most often tells the reason for those errors!

 

Then you may attach your VI to allow us to inspect them.

Then you should go through the LabVIEW FPGA basics, as the FPGA module only allows for a subset of all LabVIEW functions.

 

What do you mean by "unsolving" something?

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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@Gerd: I think he means that putting the code from the subvi into the caller would magically resolve the errors...... and THAT would be "unsolve"

 

Norbert

Norbert
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@ysma wrote:

Hello everyone,

 

I made a complicated circuit in a vi file, to ease my work, I grouped several items into several sub vi files it works normally, I tried to implement this vi file and its subs to a project to simulate the FPGA, but it gives me many errors although I put the vi file and is subs under the cRIO FPGA chosen by me.


This just screams using a function that is not supported in FPGA.  As Gerd said, look at the error messages, they should tell you exactly what is wrong.  Or you can post your code and we can help you dig into it.


GCentral
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