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We appreciate your patience as we improve our online experience.
11-23-2009 01:02 AM - edited 11-23-2009 01:05 AM
Hello,
I'm having some issues with my project. I can't figure out what's wrong. The project is to build a FPGA-target which uses a trigger to start sampling data and it also needs to have pre/post trigger functions, but it just won't trigger when it's supposed to.
I'm attaching my program.
Regards,
Tim Jansson
(It seems that I managed to double post this thread again. I apologize and hope that this won't cause too much problems)
Solved! Go to Solution.
11-25-2009 01:31 AM
I'm quite stuck acctually. Right now, my FPGA works...bad. It triggers but now I'm using 3 FIFOs (one local) and I don't think this is neccesary. My host program is even worse, and it doesn't even uses the trigger.
Don't even bother to look at the Front Panel! 😉
Tim
11-25-2009 03:25 AM
Tim,
i am sorry. But reading your posts and looking into your code, i do not understand, what you are trying to achieve in the first place.
I suggest you to describe what your task is, what is the setup (without any code) and if there are any restrictions.
hope this helps,
Norbert
11-25-2009 03:47 AM - edited 11-25-2009 03:48 AM
Thanks for reply!
I'm sorry for being confusing! I manage to solve the problem and I understand that you were confused by my previous code. It confused me as well. I got things mixed up, and I made things much more complicated than it should be, but the problem is solved and the result is a simple code
Sorry for the inconvenience!
Regards,
Tim
11-25-2009 07:05 AM
Is it possible to send a huge amount of elements (I might need to sample 30 seconds) through DMA even though my FIFO size is only ~2000 elements? Is it possible to "wrap" these up in blocks and send the blocks as elements? Or do I have to make a new code from the beginning?
Regards,
Tim
11-26-2009 12:50 AM
03-22-2013 06:22 AM
Hello
Is it possible for you to upload the fixed VI?