PID (FPGA) Express VI Gain Settings

[johnsoja]

There really is a great deal of confusion for me surrounding the gain settings of the PID (FPGA) Express VI.  I use Matlab Simulink and tune my servo using that tool, which uses the classical parallel form PID approach (see attachment screenshot).  Assuming that in my Labview FPGA vi that I am assigning gains through a control box wired to the PID (FPGA) Express vi block gain input and it's running at 20KHz, I would like to have someone knowledgeable tell me what they would input into each gain field to effectively mimic the following Matlab parallel form PID gain settings.  In Matlab (Simulink) I'm using the Discrete PID block with a sample time of (1/20000), a P gain of 5, an I gain of 700, and a D gain of 0.  What are the equivalent settings for the Labview control block input into the PID FPGA Express vi block?

Also, I would like to have the precise equations that relate parallel form PID (Matlab) gains into the Labview PID FPGA Express VI gains.  I know that the Labview PID will allow an integral gain only (where P gain is 0) and it doesn't zero the output, but from the equations provided in the help it certainly appears as though it would.  Please explain.

Thanks,

JJ

[nathand]

Is your question, what value should you enter in the Express VI configuration dialog box, or what value should you wire to the gain inputs? Those are different questions.

The values that you enter in the FPGA PID Express VI configuration are normalized, through the equations given in the help, into the gains that are actually used when the VI is running. That way you can take the gains used in the standard LabVIEW PID, enter them in the Express VI, and do the conversion once at edit-time rather than continuously at run-time, saving FPGA resources and computing time.

However, if you wire gains into the FPGA PID Express VI, then it uses those gains directly, as described in the help, and ignores any values that were configured in the Express VI configuration dialog. This makes it possible to use the PID as a pure integrator, for example. You may want to implement the equations exactly as described in the FPGA PID help, and compare with the Simulink results for the same input sequence.

If the sample time in the FPGA is the same as the sample time in the Simulink simulation, then you should be able to wire the same gains (at least for P and I, and you're not using D so the difference in implementation doesn't matter). If you prefer to use the Express VI configuration, then you'll have to reverse the equation to calculate the correct inputs such that the computed (normalized) gains match the ones used in the Simulink model. If Simulink uses a different integrator then you may get slightly different numbers, but they shouldn't be too far off. Also, if the sampling periods are different, then you'll need to adjust the integral gain to compensate. Finally, I note that your simulink model appears to use the error as its input, whereas the the LabVIEW block takes the setpoint and process variable, and calculates the error.