05-19-2016 06:14 AM
You are performing 2 reads in parallel with each other from the same file. The Read moves the file pointer. So what you are sending to the FPGA is not the same data you are writing to your "split" file.
05-19-2016 06:29 AM
Here is a cleaned up version of your VI I put together. I did not handle all of the FIFOs, but you should figure out how to handle them. In short, use a FOR loop to access your FIFOs. This will save A LOT of diagram space and make it more readable. I also used Reshape Array to make a 2D array so that I could autoindex the rows to write to the FIFOs. I also changed the main loop to a While loop and used the fact that an error will be thrown when the end of file is encountered.
05-20-2016 05:10 AM
Dear crossrulz,
Thank you for your response and for the work you did to help me. I had not noticed the fact that the pointer was being changed twice a read.
The only thing is that the data send to the fpga is the same for all FPGAs, should I put some kind of splitting array there?In order to get the part of array I want into each FIFO.
Thanks again.
Kind regards,
Miguel.
05-20-2016 05:43 AM
Edit :
Dear crossrulz,
Thank you for your response and for the work you did to help me. I had not noticed the fact that the pointer was being changed twice a read.The only thing is that the data send to the fpga is the same for all FPGAs, should I put some kind of splitting array there?In order to get the part of array I want into each FIFO.
The real problem is in the data (image attached). Could be only a problem of the visor?
Thanks again.
Kind regards,
Miguel.