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Multiple PWM output channels with variable Duty cycle including 0% and 100%

Hello,

This is my typical configuration :

Windows 7 or Windows XP. Labview 2012. PCI-6602 for 8 channels PWM generation. I am using Counter Outputs in MAX (1 counter output per task). I am also using a few digital outputs lines from the PCI-6602.

I am running tests where I need to generate 8 PWM simultaneously. The frequencies are typically between 1 and 1000Hz and the duty cycles vary from 0 to 100% (limits included!) during the tests. Frequency and duty cycles can be different per channel.

The only issue that I have is when one or more channels have to be set to 0 or 100% duty cycle (0.001… and 99.999…% are not accepted by my customers). Because those values are not accepted by the DAQmx Write (Counter Frequency 1Chan 1Samp).vi I am forced to use the following trick:

-          Unreserve the task

-          Stop the task

-          Change the task’s idle State to either Low (DC=0%) or High (DC=100%)

-          Start the task

-          Stop the task

-          Reserve task

-          And when a value <> 0 or 100% is requested then restart the task with the new duty cycle

Even worse, as soon as one of the 8 channels requires 0 or 100% I am forced to apply the procedure above to all the channels to avoid the error -201133:

Possible reason(s):

Device cannot be configured for input or output because lines and/or terminals on this device are in use by another task or route. This operation requires temporarily reserving all lines and terminals for communication, which interferes with the other task or route.

If possible, use DAQmx Control Task to reserve all tasks that use this device before committing any tasks that use this device. Otherwise, uncommit or unreserve the other task or disconnect the other route before attempting to configure the device for input or output

I have never understood why I need to reserve the tasks as they are all output tasks and not a mix of inputs and outputs but if I do not do this I keep getting this error -201133. http://digital.ni.com/public.nsf/allkb/0495B7D5E2345DF386257730007EFD17

This leads to a very cumbersome coding as you can see in the attached file. It shows what I did for the ‘simple’ case where I have only 2 PWM channels to take into account.

Isn’t there a nicer or easier way to manage this? Would it be possible that the MAX layer takes into account the 0 and 100% all by himself?

Thanks

Christophe

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Noone with a solution?

Annoying issue also for me.

0% and 100% is required!

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Where I've seen variable duty cycle PWM used in real life, I could not make a straight-faced argument that 100% duty cycle would be observably different than a 20-25  nanosec worth of off time.  There's generally some kind of physical actuator somewhere down the line which doesn't have > 10 MHz response bandwidth.

 

The simplest solution is to live with the limitations of a minimal 20-25 msec ON or OFF time that approximates 0 or 100% duty cycle.  If I had users insisting on pure 0 or 100, I'd consider their rationale very skeptically.  I'd offer them much faster delivery using a straightforward implementation that approached 0 and 100 very closely.

 

The minimum time allowed for either ON or OFF time in a pulse train is 2 cycles of the max internal timebase.  This will usually end up being either 20 or 25 nanosec on most general purpose NI DAQ boards.  For 1 kHz PWM, you'd be able to range from about 0.0025 to 99.9975% duty cycle -- off by only 1 part in 40000 from the nominal of 0 and 100%.   And again -- is the process downstream really capable of >10 MHz response bandwidth?

 

 

-Kevin P

 

CAUTION! New LabVIEW adopters -- it's too late for me, but you *can* save yourself. The new subscription policy for LabVIEW puts NI's hand in your wallet for the rest of your working life. Are you sure you're *that* dedicated to LabVIEW? (Summary of my reasons in this post, part of a voluminous thread of mostly complaints starting here).
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Thanks for your well formulated thoughts. 

Your right, it's more a formal aspect, of what is possible to mention in a specification towards customer.

 

The actual Background for me is PWM controlled automotive Signal lights, teststands for testing those light according specification.

These lights are based on LED and their typical PWM-frequency is between 150, 300 or max. 1000 Hz, to keep EMR Radiation down.

 

Customer formally mentioned 0 and 100% as a requirement. But based on a 16-bit Counter or 32-bit, it cant be very different if ist 0.1 or 99.9% (i dont know if 32bit Counters are possible for PWM-frequency Generation, for example on X-Series 6351).

 

Maybe i would use a seperate digital port to completely switch off or on a PWM Signal outside the DAQ-Card using logial AND-Gate, if required. But if fast Timing is required, this will raise the Need of finding an accurate synchronization method between DO and the pulse pattern generated.

 

Patterns are needed, bec those lights have Animation, which can be a short light-show when car is unlocked, or a dimming when lamps go off, etc. These Need to be precicely tested also in Terms of correct Timings.

 

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Hi Visualizer,

 

no help here, just a thought/suggestion:

With RIO devices you can utilize their FPGA. On the FPGA you have to program the PWM by yourself, but your are free to include the full range of 0%…100% duty!

 

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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