Lock-in Amplifier

[cL1br]

Hi,

You'll have to forgive my total ineptitude here - labview isn't at all my area of expertise!

I need to simulate the operation of a lock-in amplifier, so have been working with the example found here.

I'd like to modify the VI to be able to input a reference signal of known shape and frequency (eg sine, 1kHz) manually, rather than using a physical reference through data acquisition - can anybody advise as to the best way of going about this?

Thanks.

[johnsold]

I have not used that VI and it is not well documented.

From looking at the block diagram it appears that the reference signal is the first channel in the 2D array of data obtained from the Analog Read. So you should be able to do your simulation by generating your reference signal and your data signals and combining them into a 2D array.  Just remove all the DAQmx VIs and put your signal simulation VIs in their place.  Be sure to save a copy under a new name before you start changing things so you can go back to the original if you need to do so.

Note that the arrays you generate for the reference and data signals need to have the same number of samples and sampling rate.

Lynn

[Stephan_D]

Hi

you could also use this example without real hardware. To do this, you must remove the DAQmx Task for the real hardware, like Lynn told you befor. I attached a picture to my post. The parts in the red boxes could be deleted. This parts are used for the real hardware which you don't want to use. After this step, you could input your simulated signal. The right position for this is the marked wire.

Regards, Stephan

[cL1br]

Thanks to both of you for taking the time to have a look and help - to clarify, I will be using physical hardware to obtain the actual signal itself, just not the reference signal.

Phil

[Mitss]

Stephan,

I did exactly what you said and wired the input signal (sinusoidal multiplied with white noise) to the correct position. However although the lock in amplifier (X,Y, R, theta) seems to work properly the PLL frequency (fr) stays at 100 no matter what I do. Any idea why is that?

Regards,

Dimitris

[johnsold]

Dimitris,

I located one error. The Lock error = -2 indicates that the sampling frequency is below the minimum for the PLL VI. That minimum is 50000 samples per second.  This information is at the bottom of the context help window.

However, increasing the sampling rate to 100000 eliminates the error but does not get the frequency detection working.

I suspect that the Filter TC may be the next thing to look at.  The explanation in the context help is not the most clear.  I tried several values without success.

I just tried one other thing which seems to get it working: I disconnected the boolean from Init terminal.  Now frequency is quite close to the input.

Lynn

[Mitss]

Thank you very much Lynn...I appreciate your help

[Mitss]

Lynn,

One more question since it seems that you understand about LI. I have wired the ref and waveform signals given in the above vi to two waveforms taken from an ADC DAQ card. However, it seems that the PLL does not work in such case (I have tried several different frequencies etc etc). Actually no error message appears but fr=10^-6, phase=0 and the updated button is switched off.  Do you have any idea why this could happen?

[johnsold]

Dimitris,

I have used hardware lock-ins a bit and have worked with hardware PLLs much more. I have not actually used the software PLL or LI.

In looking at the last VI you posted I found that setting the Init input to the PLL VI to False seems to allow it to track the input signal. You had it wired to i = 0 comparison (which is what the help suggests). I put an indicator on the Reference Info output and on the Filter TC(s) out to monitor what was going on.  Small values of Filter TC in are overridden.  Leaving that input disconnected may be OK.  If the frequency chages significantly it sometimes takes two runs of the VI to get the fr output to match the input frequency.  This and the help comments about the Init input suggest that the PLL VI retains some state data internally between calls.  You may want to let the while loop run more than one iteration.

Lynn

[Mitss]

Lynn,

Thank you very much for your help, however, unfortunately my problem is not yet solved. Do you know if there is any limitation for the input signals (related either to number of points or the actual type e.g., integer-real etc)..?

I think I have tried everything else..

Dimitris