Labview FPGA + NI 6587 + NI-7952A

[papacifacile]

Dear Everybody,

We are using NI-6587 16 Channels LVDS 1GS/ch  with FPGA Module NI-PXI7952.

We want to acquire signals, with this configuration, coming from system with an output data rate of 800 MSPS. We are looking for program examples to clarify the use of the system.

For the moment, the acquisition speed, we can reach, is 250MSPS. 😞   (and with 8 channels! )

Thanks for your Help.

Seb.

[David-A]

What rate is your clock source running at? You should be able to set the internal clock to 400MHz and use a DDR Serdes CLIP to acquire at 800 MSPS. The example in the directory at <LabVIEW>\examples\FlexRIO\IO Modules\NI 6587\SerialAcqConfig demonstrates how to configure the on board oscillator. 

[papacifacile]

Hello,

We are rookie with this configuration.

Can you give us explanation to configure the system to work properly regard to ours needs?

Is there more documentations, except user guide and specification,  which give more explanations for the settings and so on?

Thanks.

[Kyle_G]

The "NI 6587 Finite Acquisition- External Clock Start Trigger" example project is probably the best place to start.  This uses an external clock instead of the onboard oscillator, but at an output rate of 400MHz/800Mbit I would highly recommend using an external clock instead of the onboard clock.  At that rate, it would be very difficult (if not impossible) to get the onboard oscilator to sync up with the data reliably. The comments in the host code give a good overview of how configuration works, but you can find more detail about each CLIP in the FlexRIO help.

[SAMUEL_NIF]

Hello,

This guide could be very usefull for your application

Revision No. 1 .1 – February 2014 Recommended Practices for Optimizing LabVIEW RIO Applications NI L...

Regards