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We appreciate your patience as we improve our online experience.
04-08-2017 01:12 AM
Hi !
I am using cRIO 9075 and analog input module 9201. I have used a example given in NI to acquire analog input from 9210 i got the pure sine wave. I used a function generator to give input to 9201. but next time when i run that vi i get ripples. can anyone clarify me what had happened in this labview. I have attached the vi. and also the screen shots.
04-08-2017 08:26 PM - edited 04-08-2017 08:27 PM
You have 3 channels going into the DMA FIFO, but you are reading a number of samples not divisible by 3. So you are causing your channels to get out of sync. And then your Resize makes absolutely no sense.
So let's make the loop take 100ms. Since you are sampling at 2kHz, in 100ms you will have 200 samples per channel. You should therefore have 600 samples from your 3 channels. So have the DMA Read get 600 samples. You can then reshape the array and transpose to get the output array you need. And do set your wait to 100ms.
04-09-2017 02:50 AM
Hi,
Thanks for the reply. May i Know whats mean my resize as you have mentioned resize makes no sense.
But I used this values for the 1st time i got the output.
Now its showing error as FIFO read error -50400.
Thanks
Surya S
04-09-2017 06:13 AM
What value did you use for your count timer on the FPGA? Sounds like you set it to something slower than 500us.
04-09-2017 07:36 AM
I kept 500 us only.